[llvm-exegesis] Get the BenchmarkRunner from the ExegesisTarget.
Summary:
This allows targets to override code generation for some instructions.
As an example of override, this also moves ad-hoc instruction filtering
for X86 into the X86 ExegesisTarget.
Reviewers: gchatelet
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48587
llvm-svn: 335582
diff --git a/llvm/tools/llvm-exegesis/lib/Assembler.cpp b/llvm/tools/llvm-exegesis/lib/Assembler.cpp
index 9410c70..c7fc6bd 100644
--- a/llvm/tools/llvm-exegesis/lib/Assembler.cpp
+++ b/llvm/tools/llvm-exegesis/lib/Assembler.cpp
@@ -138,7 +138,7 @@
return MF.getSubtarget().getRegisterInfo()->getReservedRegs(MF);
}
-void assembleToStream(const ExegesisTarget *ET,
+void assembleToStream(const ExegesisTarget &ET,
std::unique_ptr<llvm::LLVMTargetMachine> TM,
llvm::ArrayRef<unsigned> RegsToDef,
llvm::ArrayRef<llvm::MCInst> Instructions,
@@ -157,11 +157,10 @@
auto &Properties = MF.getProperties();
Properties.set(llvm::MachineFunctionProperties::Property::NoVRegs);
Properties.reset(llvm::MachineFunctionProperties::Property::IsSSA);
- std::vector<llvm::MCInst> SnippetWithSetup;
- bool IsSnippetSetupComplete = RegsToDef.empty();
- if (ET) {
- SnippetWithSetup =
- generateSnippetSetupCode(RegsToDef, *ET, IsSnippetSetupComplete);
+ bool IsSnippetSetupComplete = false;
+ std::vector<llvm::MCInst> SnippetWithSetup =
+ generateSnippetSetupCode(RegsToDef, ET, IsSnippetSetupComplete);
+ if (!SnippetWithSetup.empty()) {
SnippetWithSetup.insert(SnippetWithSetup.end(), Instructions.begin(),
Instructions.end());
Instructions = SnippetWithSetup;
@@ -190,10 +189,8 @@
PM.add(MMI.release());
TPC->printAndVerify("MachineFunctionGenerator::assemble");
// Add target-specific passes.
- if (ET) {
- ET->addTargetSpecificPasses(PM);
- TPC->printAndVerify("After ExegesisTarget::addTargetSpecificPasses");
- }
+ ET.addTargetSpecificPasses(PM);
+ TPC->printAndVerify("After ExegesisTarget::addTargetSpecificPasses");
// Adding the following passes:
// - machineverifier: checks that the MachineFunction is well formed.
// - prologepilog: saves and restore callee saved registers.