add (and document) the ability for alias results to have
fixed physical registers. Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).
llvm-svn: 118352
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 4686614..151c1b2 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -274,7 +274,10 @@
/// ImmOperand - This represents an immediate value that is dumped into
/// the operand.
- ImmOperand
+ ImmOperand,
+
+ /// RegOperand - This represents a fixed register that is dumped in.
+ RegOperand
} Kind;
union {
@@ -288,6 +291,9 @@
/// ImmVal - This is the immediate value added to the instruction.
int64_t ImmVal;
+
+ /// Register - This is the register record.
+ Record *Register;
};
/// OpInfo - This is the information about the instruction operand that is
@@ -320,6 +326,16 @@
X.OpInfo = Op;
return X;
}
+
+ static ResOperand getRegOp(Record *Reg,
+ const CGIOperandList::OperandInfo *Op) {
+ ResOperand X;
+ X.Kind = RegOperand;
+ X.Register = Reg;
+ X.OpInfo = Op;
+ return X;
+ }
+
};
/// TheDef - This is the definition of the instruction or InstAlias that this
@@ -1243,7 +1259,8 @@
// Find out what operand from the asmparser that this MCInst operand comes
// from.
- if (CGA.ResultOperands[AliasOpNo].isRecord()) {
+ switch (CGA.ResultOperands[AliasOpNo].Kind) {
+ case CodeGenInstAlias::ResultOperand::K_Record: {
StringRef Name = CGA.ResultOperands[AliasOpNo++].getName();
int SrcOperand = FindAsmOperandNamed(Name);
if (SrcOperand != -1) {
@@ -1255,10 +1272,18 @@
TheDef->getName() + "' has operand '" + OpInfo.Name +
"' that doesn't appear in asm string!");
}
-
- int64_t ImmVal = CGA.ResultOperands[AliasOpNo++].getImm();
- ResOperands.push_back(ResOperand::getImmOp(ImmVal, &OpInfo));
- continue;
+ case CodeGenInstAlias::ResultOperand::K_Imm: {
+ int64_t ImmVal = CGA.ResultOperands[AliasOpNo++].getImm();
+ ResOperands.push_back(ResOperand::getImmOp(ImmVal, &OpInfo));
+ continue;
+ }
+
+ case CodeGenInstAlias::ResultOperand::K_Reg: {
+ Record *Reg = CGA.ResultOperands[AliasOpNo++].getRegister();
+ ResOperands.push_back(ResOperand::getRegOp(Reg, &OpInfo));
+ continue;
+ }
+ }
}
}
@@ -1341,6 +1366,11 @@
Signature += "__imm" + itostr(Val);
break;
}
+ case MatchableInfo::ResOperand::RegOperand: {
+ std::string N = getQualifiedName(OpInfo.Register);
+ CaseOS << " Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
+ Signature += "__reg" + OpInfo.Register->getName();
+ }
}
}