32-to-64-bit sext_inreg pattern.

llvm-svn: 147004
diff --git a/llvm/test/CodeGen/Mips/mips64ext.ll b/llvm/test/CodeGen/Mips/mips64ext.ll
index ae6078b..7981ec7 100644
--- a/llvm/test/CodeGen/Mips/mips64ext.ll
+++ b/llvm/test/CodeGen/Mips/mips64ext.ll
@@ -9,3 +9,11 @@
   %conv = zext i32 %add to i64
   ret i64 %conv
 }
+
+define i64 @sext64_32(i32 %a) nounwind readnone {
+entry:
+; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, 0
+  %conv = sext i32 %a to i64
+  ret i64 %conv
+}
+