commit 4a8208c266e083945ddaa5e13afb61b19b977b80
author Eric Christopher <echristo@gmail.com> Sun Feb 26 00:11:58 2017 +0000
committer Eric Christopher <echristo@gmail.com> Sun Feb 26 00:11:58 2017 +0000
tree d130db87ea69b0b0b7bf63faaafa05c74049a3ff
parent c46fe0d62980bbab7c02b807b709f8ad1d1b972d

vec perm can go down either pipeline on P8.
No observable changes, spotted while looking at the scheduling description.

llvm-svn: 296277

llvm/lib/Target/PowerPC/PPCScheduleP8.td

diff --git a/llvm/lib/Target/PowerPC/PPCScheduleP8.td b/llvm/lib/Target/PowerPC/PPCScheduleP8.td
index 8e52da5..79963dd 100644
--- a/llvm/lib/Target/PowerPC/PPCScheduleP8.td
+++ b/llvm/lib/Target/PowerPC/PPCScheduleP8.td
@@ -377,7 +377,7 @@
                                    InstrStage<1, [P8_FPU1, P8_FPU2]>],
                                   [7, 1, 1]>,
   InstrItinData<IIC_VecPerm     , [InstrStage<1, [P8_DU1, P8_DU2], 0>,
-                                   InstrStage<1, [P8_FPU2, P8_FPU2]>],
+                                   InstrStage<1, [P8_FPU1, P8_FPU2]>],
                                   [3, 1, 1]>
 ]>;