| commit | 4ac341c8b31ab34c7cb90eda91a91e78a11a8baf | [log] [tgz] |
|---|---|---|
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | Thu Apr 14 21:58:15 2016 +0000 |
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | Thu Apr 14 21:58:15 2016 +0000 |
| tree | 195717ee1a4094630e5031af4dcf161e748169f8 | |
| parent | 7900334dd530416b70fb04c8abb6f8c2c65da86d [diff] |
AMDGPU: Directly emit m0 initialization with s_mov_b32 Currently what comes out of instruction selection is a register initialized to -1, and then copied to m0. MachineCSE doesn't consider copies, but we want these to be CSEed. This isn't much of a problem currently, because SIFoldOperands is run immediately after. This avoids regressions when SIFoldOperands is run later from leaving all copies to m0. llvm-svn: 266377