commit 4b3774e0a2d6463553b693677ec6eb7c35697ea8
author Evan Cheng <evan.cheng@apple.com> Wed Jan 18 08:08:38 2006 +0000
committer Evan Cheng <evan.cheng@apple.com> Wed Jan 18 08:08:38 2006 +0000
tree d6864110ea897e8e8eda4eaabf3c81e594de8a73
parent 0e9bd5a416521f6a2c0cdf5968422f479c0b001f

If a call return type is i1, insert a truncate from X86::AL to i1.

llvm-svn: 25415

llvm/lib/Target/X86/X86ISelLowering.cpp

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 1d71891..6a65614 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -531,6 +531,8 @@
       case MVT::i8:
         RetVal = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag);
         Chain = RetVal.getValue(1);
+        if (RetTyVT == MVT::i1) 
+          RetVal = DAG.getNode(ISD::TRUNCATE, MVT::i1, RetVal);
         break;
       case MVT::i16:
         RetVal = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag);
@@ -1057,6 +1059,8 @@
       case MVT::i8:
         RetVal = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag);
         Chain = RetVal.getValue(1);
+        if (RetTyVT == MVT::i1) 
+          RetVal = DAG.getNode(ISD::TRUNCATE, MVT::i1, RetVal);
         break;
       case MVT::i16:
         RetVal = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag);