commit 4bcb9c334953fc62c0b10385d4d5fd72d594bafa
author Michael Zuckerman <Michael.zuckerman@intel.com> Thu Jun 29 10:00:33 2017 +0000
committer Michael Zuckerman <Michael.zuckerman@intel.com> Thu Jun 29 10:00:33 2017 +0000
tree 7971f6f9721f5a2571ea4b3550479b9b575cbb49
parent 6936506f504c30733b402b738a2280e34a896003

[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont

[LLVM SIDE]
Connecting the GoldMont processor to his feature.

Reviewers: 
1. igorb
2. zvi
3. delena
4. RKSimon
5. craig.topper        

Differential Revision: https://reviews.llvm.org/D34504

llvm-svn: 306658

llvm/lib/Support/Host.cpp

diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index 234f743..232efe6 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -327,6 +327,7 @@
   INTEL_COREI7_SKYLAKE_AVX512,
   INTEL_ATOM_BONNELL,
   INTEL_ATOM_SILVERMONT,
+  INTEL_ATOM_GOLDMONT,
   INTEL_KNIGHTS_LANDING,
   AMDPENTIUM_K6,
   AMDPENTIUM_K62,
@@ -707,7 +708,12 @@
       *Type = INTEL_ATOM;
       *Subtype = INTEL_ATOM_SILVERMONT;
       break; // "silvermont"
-
+    // Goldmont:
+    case 0x5c:
+    case 0x5f:
+      *Type = INTEL_ATOM;
+      *Subtype = INTEL_ATOM_GOLDMONT;
+      break; // "goldmont"
     case 0x57:
       *Type = INTEL_XEONPHI; // knl
       *Subtype = INTEL_KNIGHTS_LANDING;
@@ -1070,6 +1076,8 @@
       switch (Subtype) {
       case INTEL_ATOM_BONNELL:
         return "bonnell";
+      case INTEL_ATOM_GOLDMONT:
+        return "goldmont";
       case INTEL_ATOM_SILVERMONT:
         return "silvermont";
       default: