Fix type of LUXC1 and SUXC1. These instructions were incorrectly defined as
single-precision load and store.
Also avoid selecting LUXC1 and SUXC1 instructions during isel. It is incorrect
to map unaligned floating point load/store nodes to these instructions.
llvm-svn: 161063
diff --git a/llvm/test/CodeGen/Mips/fp-indexed-ls.ll b/llvm/test/CodeGen/Mips/fp-indexed-ls.ll
index 08bd6e7..1c4a3fd 100644
--- a/llvm/test/CodeGen/Mips/fp-indexed-ls.ll
+++ b/llvm/test/CodeGen/Mips/fp-indexed-ls.ll
@@ -28,7 +28,7 @@
define float @foo2(i32 %b, i32 %c) nounwind readonly {
entry:
-; CHECK: luxc1
+; CHECK-NOT: luxc1
%arrayidx1 = getelementptr inbounds [4 x %struct.S]* @s, i32 0, i32 %b, i32 0, i32 %c
%0 = load float* %arrayidx1, align 1
ret float %0
@@ -54,7 +54,7 @@
define void @foo5(i32 %b, i32 %c) nounwind {
entry:
-; CHECK: suxc1
+; CHECK-NOT: suxc1
%0 = load float* @gf, align 4
%arrayidx1 = getelementptr inbounds [4 x %struct.S]* @s, i32 0, i32 %b, i32 0, i32 %c
store float %0, float* %arrayidx1, align 1
@@ -64,7 +64,7 @@
define double @foo6(i32 %b, i32 %c) nounwind readonly {
entry:
; CHECK: foo6
-; CHECK-NOT: ldxc1
+; CHECK-NOT: luxc1
%arrayidx1 = getelementptr inbounds [4 x %struct.S2]* @s2, i32 0, i32 %b, i32 0, i32 %c
%0 = load double* %arrayidx1, align 1
ret double %0
@@ -73,7 +73,7 @@
define void @foo7(i32 %b, i32 %c) nounwind {
entry:
; CHECK: foo7
-; CHECK-NOT: sdxc1
+; CHECK-NOT: suxc1
%0 = load double* @gd, align 8
%arrayidx1 = getelementptr inbounds [4 x %struct.S2]* @s2, i32 0, i32 %b, i32 0, i32 %c
store double %0, double* %arrayidx1, align 1
@@ -83,7 +83,7 @@
define float @foo8() nounwind readonly {
entry:
; CHECK: foo8
-; CHECK: luxc1
+; CHECK-NOT: luxc1
%0 = load float* getelementptr inbounds (%struct.S3* @s3, i32 0, i32 1), align 1
ret float %0
}
@@ -91,7 +91,7 @@
define void @foo9(float %f) nounwind {
entry:
; CHECK: foo9
-; CHECK: suxc1
+; CHECK-NOT: suxc1
store float %f, float* getelementptr inbounds (%struct.S3* @s3, i32 0, i32 1), align 1
ret void
}