AMDGPU: Implement computeKnownBitsForTargetNode for mbcnt
llvm-svn: 318100
diff --git a/llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll b/llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
index ddeffc1..3be0f3a 100644
--- a/llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
+++ b/llvm/test/CodeGen/AMDGPU/array-ptr-calc-i64.ll
@@ -4,8 +4,8 @@
declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0
; SI-LABEL: {{^}}test_array_ptr_calc:
-; SI-DAG: v_mul_lo_i32
-; SI-DAG: v_mul_hi_i32
+; SI-DAG: v_mul_u32_u24
+; SI-DAG: v_mul_hi_u32_u24
; SI: s_endpgm
define amdgpu_kernel void @test_array_ptr_calc(i32 addrspace(1)* noalias %out, [1025 x i32] addrspace(1)* noalias %inA, i32 addrspace(1)* noalias %inB) {
%mbcnt.lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
index 144c8f4..1877cc9 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll
@@ -14,6 +14,24 @@
ret void
}
+; GCN-LABEL: {{^}}mbcnt_lo_known_bits:
+; GCN: v_mbcnt_lo_u32_b32
+; GCN-NOT: and
+define i32 @mbcnt_lo_known_bits(i32 %x, i32 %y) #0 {
+ %lo = call i32 @llvm.amdgcn.mbcnt.lo(i32 %x, i32 %y)
+ %mask = and i32 %lo, 63
+ ret i32 %mask
+}
+
+; GCN-LABEL: {{^}}mbcnt_hi_known_bits:
+; GCN: v_mbcnt_hi_u32_b32
+; GCN-NOT: and
+define i32 @mbcnt_hi_known_bits(i32 %x, i32 %y) #0 {
+ %hi = call i32 @llvm.amdgcn.mbcnt.hi(i32 %x, i32 %y)
+ %mask = and i32 %hi, 63
+ ret i32 %mask
+}
+
declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
declare i32 @llvm.amdgcn.mbcnt.hi(i32, i32) #0
declare void @llvm.amdgcn.exp.f32(i32, i32, float, float, float, float, i1, i1) #1