[ARM] Implement ISB memory barrier intrinsic
Adds support for __builtin_arm_isb. Also corrects DSB and ISB instructions
modelling by adding has-side-effects property.
llvm-svn: 212277
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index 9fa8fd1..f7d5623 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -613,8 +613,8 @@
if (CheckNeonBuiltinFunctionCall(BuiltinID, TheCall))
return true;
- // For NEON intrinsics which take an immediate value as part of the
- // instruction, range check them here.
+ // For intrinsics which take an immediate value as part of the instruction,
+ // range check them here.
unsigned i = 0, l = 0, u = 0;
switch (BuiltinID) {
default: return false;
@@ -623,7 +623,8 @@
case ARM::BI__builtin_arm_vcvtr_f:
case ARM::BI__builtin_arm_vcvtr_d: i = 1; u = 1; break;
case ARM::BI__builtin_arm_dmb:
- case ARM::BI__builtin_arm_dsb: l = 0; u = 15; break;
+ case ARM::BI__builtin_arm_dsb:
+ case ARM::BI__builtin_arm_isb: l = 0; u = 15; break;
}
// FIXME: VFP Intrinsics should error if VFP not present.