Fix alignment of arm64 fpu register context structure
so it has the same padding as the kernel's definition
which is written in terms of uint128_t. Original patch
by Ryan Mansfield.
<rdar://problem/35468499>
llvm-svn: 318357
diff --git a/lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp b/lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
index 0b62591..df334f8 100644
--- a/lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
+++ b/lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
@@ -686,7 +686,7 @@
case FPURegSet: {
uint8_t *fpu_reg_buf = (uint8_t *)&fpu.v[0];
const int fpu_reg_buf_size = sizeof(fpu);
- if (fpu_reg_buf_size == count &&
+ if (fpu_reg_buf_size == count * sizeof(uint32_t) &&
data.ExtractBytes(offset, fpu_reg_buf_size, eByteOrderLittle,
fpu_reg_buf) == fpu_reg_buf_size) {
SetError(FPURegSet, Read, 0);