Make x86 fast-isel correctly choose between aligned and unaligned operations for vector stores. Fixes PR16640.
llvm-svn: 186491
diff --git a/llvm/test/CodeGen/X86/fast-isel-store.ll b/llvm/test/CodeGen/X86/fast-isel-store.ll
new file mode 100644
index 0000000..06f5b66
--- /dev/null
+++ b/llvm/test/CodeGen/X86/fast-isel-store.ll
@@ -0,0 +1,48 @@
+; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort -mattr=+sse2 < %s | FileCheck %s
+; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort -mattr=+sse2 < %s | FileCheck %s
+
+define i32 @test_store_32(i32* nocapture %addr, i32 %value) {
+entry:
+ store i32 %value, i32* %addr, align 1
+ ret i32 %value
+}
+
+; CHECK: ret
+
+define i16 @test_store_16(i16* nocapture %addr, i16 %value) {
+entry:
+ store i16 %value, i16* %addr, align 1
+ ret i16 %value
+}
+
+; CHECK: ret
+
+define <4 x i32> @test_store_4xi32(<4 x i32>* nocapture %addr, <4 x i32> %value, <4 x i32> %value2) {
+; CHECK: movdqu
+; CHECK: ret
+ %foo = add <4 x i32> %value, %value2 ; to force integer type on store
+ store <4 x i32> %foo, <4 x i32>* %addr, align 1
+ ret <4 x i32> %foo
+}
+
+define <4 x i32> @test_store_4xi32_aligned(<4 x i32>* nocapture %addr, <4 x i32> %value, <4 x i32> %value2) {
+; CHECK: movdqa
+; CHECK: ret
+ %foo = add <4 x i32> %value, %value2 ; to force integer type on store
+ store <4 x i32> %foo, <4 x i32>* %addr, align 16
+ ret <4 x i32> %foo
+}
+
+define <4 x float> @test_store_4xf32(<4 x float>* nocapture %addr, <4 x float> %value) {
+; CHECK: movups
+; CHECK: ret
+ store <4 x float> %value, <4 x float>* %addr, align 1
+ ret <4 x float> %value
+}
+
+define <4 x float> @test_store_4xf32_aligned(<4 x float>* nocapture %addr, <4 x float> %value) {
+; CHECK: movaps
+; CHECK: ret
+ store <4 x float> %value, <4 x float>* %addr, align 16
+ ret <4 x float> %value
+}