[CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 314559
diff --git a/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp b/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
index 5abf50e..d7f91fc 100644
--- a/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
+++ b/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
@@ -1,4 +1,4 @@
-//===----- AggressiveAntiDepBreaker.cpp - Anti-dep breaker ----------------===//
+//===- AggressiveAntiDepBreaker.cpp - Anti-dep breaker --------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -15,16 +15,33 @@
//===----------------------------------------------------------------------===//
#include "AggressiveAntiDepBreaker.h"
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/CodeGen/RegisterClassInfo.h"
+#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/MC/MCInstrDesc.h"
+#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+#include <cassert>
+#include <map>
+#include <set>
+#include <utility>
+#include <vector>
+
using namespace llvm;
#define DEBUG_TYPE "post-RA-sched"
@@ -34,18 +51,17 @@
DebugDiv("agg-antidep-debugdiv",
cl::desc("Debug control for aggressive anti-dep breaker"),
cl::init(0), cl::Hidden);
+
static cl::opt<int>
DebugMod("agg-antidep-debugmod",
cl::desc("Debug control for aggressive anti-dep breaker"),
cl::init(0), cl::Hidden);
AggressiveAntiDepState::AggressiveAntiDepState(const unsigned TargetRegs,
- MachineBasicBlock *BB) :
- NumTargetRegs(TargetRegs), GroupNodes(TargetRegs, 0),
- GroupNodeIndices(TargetRegs, 0),
- KillIndices(TargetRegs, 0),
- DefIndices(TargetRegs, 0)
-{
+ MachineBasicBlock *BB)
+ : NumTargetRegs(TargetRegs), GroupNodes(TargetRegs, 0),
+ GroupNodeIndices(TargetRegs, 0), KillIndices(TargetRegs, 0),
+ DefIndices(TargetRegs, 0) {
const unsigned BBSize = BB->size();
for (unsigned i = 0; i < NumTargetRegs; ++i) {
// Initialize all registers to be in their own group. Initially we
@@ -76,8 +92,7 @@
}
}
-unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2)
-{
+unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2) {
assert(GroupNodes[0] == 0 && "GroupNode 0 not parent!");
assert(GroupNodeIndices[0] == 0 && "Reg 0 not in Group 0!");
@@ -92,8 +107,7 @@
return Parent;
}
-unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg)
-{
+unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) {
// Create a new GroupNode for Reg. Reg's existing GroupNode must
// stay as is because there could be other GroupNodes referring to
// it.
@@ -103,8 +117,7 @@
return idx;
}
-bool AggressiveAntiDepState::IsLive(unsigned Reg)
-{
+bool AggressiveAntiDepState::IsLive(unsigned Reg) {
// KillIndex must be defined and DefIndex not defined for a register
// to be live.
return((KillIndices[Reg] != ~0u) && (DefIndices[Reg] == ~0u));
@@ -115,8 +128,7 @@
TargetSubtargetInfo::RegClassVector &CriticalPathRCs)
: AntiDepBreaker(), MF(MFi), MRI(MF.getRegInfo()),
TII(MF.getSubtarget().getInstrInfo()),
- TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI),
- State(nullptr) {
+ TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI) {
/* Collect a bitset of all registers that are only broken if they
are on the critical path. */
for (unsigned i = 0, e = CriticalPathRCs.size(); i < e; ++i) {
@@ -250,7 +262,7 @@
/// AntiDepEdges - Return in Edges the anti- and output- dependencies
/// in SU that we want to consider for breaking.
-static void AntiDepEdges(const SUnit *SU, std::vector<const SDep*>& Edges) {
+static void AntiDepEdges(const SUnit *SU, std::vector<const SDep *> &Edges) {
SmallSet<unsigned, 4> RegSet;
for (SUnit::const_pred_iterator P = SU->Preds.begin(), PE = SU->Preds.end();
P != PE; ++P) {
@@ -544,8 +556,8 @@
// break the anti-dependence.
std::vector<unsigned> Regs;
State->GetGroupRegs(AntiDepGroupIndex, Regs, &RegRefs);
- assert(Regs.size() > 0 && "Empty register group!");
- if (Regs.size() == 0)
+ assert(!Regs.empty() && "Empty register group!");
+ if (Regs.empty())
return false;
// Find the "superest" register in the group. At the same time,
@@ -732,14 +744,12 @@
/// BreakAntiDependencies - Identifiy anti-dependencies within the
/// ScheduleDAG and break them by renaming registers.
-///
unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
- const std::vector<SUnit>& SUnits,
+ const std::vector<SUnit> &SUnits,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
DbgValueVector &DbgValues) {
-
std::vector<unsigned> &KillIndices = State->GetKillIndices();
std::vector<unsigned> &DefIndices = State->GetDefIndices();
std::multimap<unsigned, AggressiveAntiDepState::RegisterReference>&
diff --git a/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h b/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
index f97e666..d3308db 100644
--- a/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
+++ b/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h
@@ -1,4 +1,4 @@
-//=- llvm/CodeGen/AggressiveAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-=//
+//==- llvm/CodeGen/AggressiveAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
@@ -19,29 +19,35 @@
#include "AntiDepBreaker.h"
#include "llvm/ADT/BitVector.h"
-#include "llvm/ADT/SmallSet.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/ScheduleDAG.h"
-#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Target/TargetSubtargetInfo.h"
#include <map>
+#include <set>
+#include <vector>
namespace llvm {
+
+class MachineBasicBlock;
+class MachineFunction;
+class MachineInstr;
+class MachineOperand;
+class MachineRegisterInfo;
class RegisterClassInfo;
+class TargetInstrInfo;
+class TargetRegisterClass;
+class TargetRegisterInfo;
/// Contains all the state necessary for anti-dep breaking.
class LLVM_LIBRARY_VISIBILITY AggressiveAntiDepState {
public:
/// Information about a register reference within a liverange
- typedef struct {
+ struct RegisterReference {
/// The registers operand
MachineOperand *Operand;
+
/// The register class
const TargetRegisterClass *RC;
- } RegisterReference;
+ };
private:
/// Number of non-virtual target registers (i.e. TRI->getNumRegs()).
@@ -110,7 +116,7 @@
class LLVM_LIBRARY_VISIBILITY AggressiveAntiDepBreaker
: public AntiDepBreaker {
- MachineFunction& MF;
+ MachineFunction &MF;
MachineRegisterInfo &MRI;
const TargetInstrInfo *TII;
const TargetRegisterInfo *TRI;
@@ -121,10 +127,10 @@
BitVector CriticalPathSet;
/// The state used to identify and rename anti-dependence registers.
- AggressiveAntiDepState *State;
+ AggressiveAntiDepState *State = nullptr;
public:
- AggressiveAntiDepBreaker(MachineFunction& MFi,
+ AggressiveAntiDepBreaker(MachineFunction &MFi,
const RegisterClassInfo &RCI,
TargetSubtargetInfo::RegClassVector& CriticalPathRCs);
~AggressiveAntiDepBreaker() override;
@@ -134,8 +140,7 @@
/// Identifiy anti-dependencies along the critical path
/// of the ScheduleDAG and break them by renaming registers.
- ///
- unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
+ unsigned BreakAntiDependencies(const std::vector<SUnit> &SUnits,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
@@ -143,7 +148,6 @@
/// Update liveness information to account for the current
/// instruction, which will not be scheduled.
- ///
void Observe(MachineInstr &MI, unsigned Count,
unsigned InsertPosIndex) override;
@@ -152,7 +156,7 @@
private:
/// Keep track of a position in the allocation order for each regclass.
- typedef std::map<const TargetRegisterClass *, unsigned> RenameOrderType;
+ using RenameOrderType = std::map<const TargetRegisterClass *, unsigned>;
/// Return true if MO represents a register
/// that is both implicitly used and defined in MI
@@ -174,6 +178,7 @@
RenameOrderType& RenameOrder,
std::map<unsigned, unsigned> &RenameMap);
};
-}
-#endif
+} // end namespace llvm
+
+#endif // LLVM_LIB_CODEGEN_AGGRESSIVEANTIDEPBREAKER_H
diff --git a/llvm/lib/CodeGen/AntiDepBreaker.h b/llvm/lib/CodeGen/AntiDepBreaker.h
index d14d931..181da83 100644
--- a/llvm/lib/CodeGen/AntiDepBreaker.h
+++ b/llvm/lib/CodeGen/AntiDepBreaker.h
@@ -1,4 +1,4 @@
-//=- llvm/CodeGen/AntiDepBreaker.h - Anti-Dependence Breaking -*- C++ -*-=//
+//===- llvm/CodeGen/AntiDepBreaker.h - Anti-Dependence Breaking -*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -15,12 +15,14 @@
#ifndef LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
#define LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
+#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/ScheduleDAG.h"
-#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Support/Compiler.h"
+#include <cassert>
+#include <utility>
#include <vector>
namespace llvm {
@@ -29,17 +31,17 @@
/// registers to break register anti-dependencies (WAR hazards).
class LLVM_LIBRARY_VISIBILITY AntiDepBreaker {
public:
- typedef std::vector<std::pair<MachineInstr *, MachineInstr *> >
- DbgValueVector;
+ using DbgValueVector =
+ std::vector<std::pair<MachineInstr *, MachineInstr *>>;
virtual ~AntiDepBreaker();
/// Initialize anti-dep breaking for a new basic block.
- virtual void StartBlock(MachineBasicBlock *BB) =0;
+ virtual void StartBlock(MachineBasicBlock *BB) = 0;
/// Identifiy anti-dependencies within a basic-block region and break them by
/// renaming registers. Return the number of anti-dependencies broken.
- virtual unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
+ virtual unsigned BreakAntiDependencies(const std::vector<SUnit> &SUnits,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
@@ -51,7 +53,7 @@
unsigned InsertPosIndex) = 0;
/// Finish anti-dep breaking for a basic block.
- virtual void FinishBlock() =0;
+ virtual void FinishBlock() = 0;
/// Update DBG_VALUE if dependency breaker is updating
/// other machine instruction to use NewReg.
@@ -81,6 +83,6 @@
}
};
-}
+} // end namespace llvm
-#endif
+#endif // LLVM_LIB_CODEGEN_ANTIDEPBREAKER_H
diff --git a/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp b/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
index be93ff0..fb26be5 100644
--- a/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
+++ b/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
@@ -15,21 +15,20 @@
///
//===----------------------------------------------------------------------===//
-#include "llvm/Analysis/LoopInfo.h"
-#include "llvm/Analysis/TargetTransformInfo.h"
-#include "llvm/Analysis/TargetTransformInfoImpl.h"
#include "llvm/CodeGen/BasicTTIImpl.h"
-#include "llvm/CodeGen/Passes.h"
+#include "llvm/IR/Function.h"
#include "llvm/Support/CommandLine.h"
-#include <utility>
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+
using namespace llvm;
// This flag is used by the template base class for BasicTTIImpl, and here to
// provide a definition.
cl::opt<unsigned>
- llvm::PartialUnrollingThreshold("partial-unrolling-threshold", cl::init(0),
- cl::desc("Threshold for partial unrolling"),
- cl::Hidden);
+llvm::PartialUnrollingThreshold("partial-unrolling-threshold", cl::init(0),
+ cl::desc("Threshold for partial unrolling"),
+ cl::Hidden);
BasicTTIImpl::BasicTTIImpl(const TargetMachine *TM, const Function &F)
: BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
diff --git a/llvm/lib/CodeGen/CalcSpillWeights.cpp b/llvm/lib/CodeGen/CalcSpillWeights.cpp
index c2ced19..1db96c9 100644
--- a/llvm/lib/CodeGen/CalcSpillWeights.cpp
+++ b/llvm/lib/CodeGen/CalcSpillWeights.cpp
@@ -1,4 +1,4 @@
-//===------------------------ CalcSpillWeights.cpp ------------------------===//
+//===- CalcSpillWeights.cpp -----------------------------------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -8,10 +8,13 @@
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/CalcSpillWeights.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
-#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/Support/Debug.h"
@@ -19,6 +22,9 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+#include <cassert>
+#include <tuple>
+
using namespace llvm;
#define DEBUG_TYPE "calcspillweights"
diff --git a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
index a3cf284..a791c01 100644
--- a/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
+++ b/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
@@ -1,4 +1,4 @@
-//===----- CriticalAntiDepBreaker.cpp - Anti-dep breaker -------- ---------===//
+//===- CriticalAntiDepBreaker.cpp - Anti-dep breaker ----------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -14,14 +14,29 @@
//===----------------------------------------------------------------------===//
#include "CriticalAntiDepBreaker.h"
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/RegisterClassInfo.h"
+#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/MC/MCInstrDesc.h"
+#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/Debug.h"
-#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+#include <cassert>
+#include <map>
+#include <utility>
+#include <vector>
using namespace llvm;
@@ -35,8 +50,7 @@
Classes(TRI->getNumRegs(), nullptr), KillIndices(TRI->getNumRegs(), 0),
DefIndices(TRI->getNumRegs(), 0), KeepRegs(TRI->getNumRegs(), false) {}
-CriticalAntiDepBreaker::~CriticalAntiDepBreaker() {
-}
+CriticalAntiDepBreaker::~CriticalAntiDepBreaker() = default;
void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
const unsigned BBSize = BB->size();
@@ -333,8 +347,7 @@
bool
CriticalAntiDepBreaker::isNewRegClobberedByRefs(RegRefIter RegRefBegin,
RegRefIter RegRefEnd,
- unsigned NewReg)
-{
+ unsigned NewReg) {
for (RegRefIter I = RegRefBegin; I != RegRefEnd; ++I ) {
MachineOperand *RefOper = I->second;
@@ -381,8 +394,7 @@
unsigned AntiDepReg,
unsigned LastNewReg,
const TargetRegisterClass *RC,
- SmallVectorImpl<unsigned> &Forbid)
-{
+ SmallVectorImpl<unsigned> &Forbid) {
ArrayRef<MCPhysReg> Order = RegClassInfo.getOrder(RC);
for (unsigned i = 0; i != Order.size(); ++i) {
unsigned NewReg = Order[i];
@@ -423,7 +435,7 @@
}
unsigned CriticalAntiDepBreaker::
-BreakAntiDependencies(const std::vector<SUnit>& SUnits,
+BreakAntiDependencies(const std::vector<SUnit> &SUnits,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
@@ -436,7 +448,7 @@
// This is used for updating debug information.
//
// FIXME: Replace this with the existing map in ScheduleDAGInstrs::MISUnitMap
- DenseMap<MachineInstr*,const SUnit*> MISUnitMap;
+ DenseMap<MachineInstr *, const SUnit *> MISUnitMap;
// Find the node at the bottom of the critical path.
const SUnit *Max = nullptr;
diff --git a/llvm/lib/CodeGen/CriticalAntiDepBreaker.h b/llvm/lib/CodeGen/CriticalAntiDepBreaker.h
index 678779f..09c4423 100644
--- a/llvm/lib/CodeGen/CriticalAntiDepBreaker.h
+++ b/llvm/lib/CodeGen/CriticalAntiDepBreaker.h
@@ -1,4 +1,4 @@
-//=- llvm/CodeGen/CriticalAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-=//
+//===- llvm/CodeGen/CriticalAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -18,16 +18,21 @@
#include "AntiDepBreaker.h"
#include "llvm/ADT/BitVector.h"
-#include "llvm/CodeGen/MachineBasicBlock.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/RegisterClassInfo.h"
-#include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/Support/Compiler.h"
+#include <map>
+#include <vector>
namespace llvm {
+
+class MachineBasicBlock;
+class MachineFunction;
+class MachineInstr;
+class MachineOperand;
+class MachineRegisterInfo;
class RegisterClassInfo;
class TargetInstrInfo;
+class TargetRegisterClass;
class TargetRegisterInfo;
-class MachineFunction;
class LLVM_LIBRARY_VISIBILITY CriticalAntiDepBreaker : public AntiDepBreaker {
MachineFunction& MF;
@@ -46,12 +51,13 @@
/// corresponding value is null. If the register is live but used in
/// multiple register classes, the corresponding value is -1 casted to a
/// pointer.
- std::vector<const TargetRegisterClass*> Classes;
+ std::vector<const TargetRegisterClass *> Classes;
/// Map registers to all their references within a live range.
std::multimap<unsigned, MachineOperand *> RegRefs;
- typedef std::multimap<unsigned, MachineOperand *>::const_iterator
- RegRefIter;
+
+ using RegRefIter =
+ std::multimap<unsigned, MachineOperand *>::const_iterator;
/// The index of the most recent kill (proceeding bottom-up),
/// or ~0u if the register is not live.
@@ -66,7 +72,7 @@
BitVector KeepRegs;
public:
- CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo&);
+ CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI);
~CriticalAntiDepBreaker() override;
/// Initialize anti-dep breaking for a new basic block.
@@ -74,7 +80,7 @@
/// Identifiy anti-dependencies along the critical path
/// of the ScheduleDAG and break them by renaming registers.
- unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
+ unsigned BreakAntiDependencies(const std::vector<SUnit> &SUnits,
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
@@ -101,6 +107,7 @@
const TargetRegisterClass *RC,
SmallVectorImpl<unsigned> &Forbid);
};
-}
-#endif
+} // end namespace llvm
+
+#endif // LLVM_LIB_CODEGEN_CRITICALANTIDEPBREAKER_H
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
index bf42722..46966cc 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
@@ -6,8 +6,10 @@
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
+//
/// \file
/// This file implements the InstructionSelector class.
+//
//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
@@ -16,11 +18,7 @@
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/MC/MCInstrDesc.h"
-#include "llvm/IR/Constants.h"
-#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetRegisterInfo.h"
diff --git a/llvm/lib/CodeGen/StackColoring.cpp b/llvm/lib/CodeGen/StackColoring.cpp
index e5fc5402..b9ddd96 100644
--- a/llvm/lib/CodeGen/StackColoring.cpp
+++ b/llvm/lib/CodeGen/StackColoring.cpp
@@ -1,4 +1,4 @@
-//===-- StackColoring.cpp -------------------------------------------------===//
+//===- StackColoring.cpp --------------------------------------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -22,35 +22,44 @@
//===----------------------------------------------------------------------===//
#include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DepthFirstIterator.h"
-#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineLoopInfo.h"
+#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineMemOperand.h"
-#include "llvm/CodeGen/MachineModuleInfo.h"
-#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/CodeGen/StackProtector.h"
#include "llvm/CodeGen/WinEHFuncInfo.h"
-#include "llvm/IR/DebugInfo.h"
+#include "llvm/IR/Constants.h"
+#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/Instructions.h"
-#include "llvm/IR/IntrinsicInst.h"
-#include "llvm/IR/Module.h"
+#include "llvm/IR/Metadata.h"
+#include "llvm/IR/Use.h"
+#include "llvm/IR/Value.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetOpcodes.h"
+#include <algorithm>
+#include <cassert>
+#include <limits>
+#include <memory>
+#include <utility>
using namespace llvm;
@@ -366,6 +375,7 @@
//
namespace {
+
/// StackColoring - A machine pass for merging disjoint stack allocations,
/// marked by the LIFETIME_START and LIFETIME_END pseudo instructions.
class StackColoring : public MachineFunctionPass {
@@ -378,32 +388,40 @@
struct BlockLifetimeInfo {
/// Which slots BEGINs in each basic block.
BitVector Begin;
+
/// Which slots ENDs in each basic block.
BitVector End;
+
/// Which slots are marked as LIVE_IN, coming into each basic block.
BitVector LiveIn;
+
/// Which slots are marked as LIVE_OUT, coming out of each basic block.
BitVector LiveOut;
};
/// Maps active slots (per bit) for each basic block.
- typedef DenseMap<const MachineBasicBlock*, BlockLifetimeInfo> LivenessMap;
+ using LivenessMap = DenseMap<const MachineBasicBlock *, BlockLifetimeInfo>;
LivenessMap BlockLiveness;
/// Maps serial numbers to basic blocks.
- DenseMap<const MachineBasicBlock*, int> BasicBlocks;
+ DenseMap<const MachineBasicBlock *, int> BasicBlocks;
+
/// Maps basic blocks to a serial number.
- SmallVector<const MachineBasicBlock*, 8> BasicBlockNumbering;
+ SmallVector<const MachineBasicBlock *, 8> BasicBlockNumbering;
/// Maps slots to their use interval. Outside of this interval, slots
/// values are either dead or `undef` and they will not be written to.
SmallVector<std::unique_ptr<LiveInterval>, 16> Intervals;
+
/// Maps slots to the points where they can become in-use.
SmallVector<SmallVector<SlotIndex, 4>, 16> LiveStarts;
+
/// VNInfo is used for the construction of LiveIntervals.
VNInfo::Allocator VNInfoAllocator;
+
/// SlotIndex analysis object.
SlotIndexes *Indexes;
+
/// The stack protector object.
StackProtector *SP;
@@ -424,13 +442,18 @@
public:
static char ID;
+
StackColoring() : MachineFunctionPass(ID) {
initializeStackColoringPass(*PassRegistry::getPassRegistry());
}
+
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
private:
+ /// Used in collectMarkers
+ using BlockBitVecMap = DenseMap<const MachineBasicBlock *, BitVector>;
+
/// Debug.
void dump() const;
void dumpIntervals() const;
@@ -489,13 +512,12 @@
/// Map entries which point to other entries to their destination.
/// A->B->C becomes A->C.
void expungeSlotMap(DenseMap<int, int> &SlotRemap, unsigned NumSlots);
-
- /// Used in collectMarkers
- typedef DenseMap<const MachineBasicBlock*, BitVector> BlockBitVecMap;
};
+
} // end anonymous namespace
char StackColoring::ID = 0;
+
char &llvm::StackColoringID = StackColoring::ID;
INITIALIZE_PASS_BEGIN(StackColoring, DEBUG_TYPE,
@@ -559,16 +581,13 @@
return -1;
}
-//
// At the moment the only way to end a variable lifetime is with
// a VARIABLE_LIFETIME op (which can't contain a start). If things
// change and the IR allows for a single inst that both begins
// and ends lifetime(s), this interface will need to be reworked.
-//
bool StackColoring::isLifetimeStartOrEnd(const MachineInstr &MI,
SmallVector<int, 4> &slots,
- bool &isStart)
-{
+ bool &isStart) {
if (MI.getOpcode() == TargetOpcode::LIFETIME_START ||
MI.getOpcode() == TargetOpcode::LIFETIME_END) {
int Slot = getStartOrEndSlot(MI);
@@ -608,8 +627,7 @@
return false;
}
-unsigned StackColoring::collectMarkers(unsigned NumSlot)
-{
+unsigned StackColoring::collectMarkers(unsigned NumSlot) {
unsigned MarkersFound = 0;
BlockBitVecMap SeenStartMap;
InterestingSlots.clear();
@@ -624,7 +642,6 @@
// Step 1: collect markers and populate the "InterestingSlots"
// and "ConservativeSlots" sets.
for (MachineBasicBlock *MBB : depth_first(MF)) {
-
// Compute the set of slots for which we've seen a START marker but have
// not yet seen an END marker at this point in the walk (e.g. on entry
// to this bb).
@@ -697,7 +714,6 @@
// NOTE: We use a depth-first iteration to ensure that we obtain a
// deterministic numbering.
for (MachineBasicBlock *MBB : depth_first(MF)) {
-
// Assign a serial number to this basic block.
BasicBlocks[MBB] = BasicBlockNumbering.size();
BasicBlockNumbering.push_back(MBB);
@@ -745,8 +761,7 @@
return MarkersFound;
}
-void StackColoring::calculateLocalLiveness()
-{
+void StackColoring::calculateLocalLiveness() {
unsigned NumIters = 0;
bool changed = true;
while (changed) {
@@ -754,7 +769,6 @@
++NumIters;
for (const MachineBasicBlock *BB : BasicBlockNumbering) {
-
// Use an iterator to avoid repeated lookups.
LivenessMap::iterator BI = BlockLiveness.find(BB);
assert(BI != BlockLiveness.end() && "Block not found");
@@ -792,7 +806,7 @@
BlockInfo.LiveOut |= LocalLiveOut;
}
}
- }// while changed.
+ } // while changed.
NumIterations = NumIters;
}
@@ -818,7 +832,6 @@
// Create the interval for the basic blocks containing lifetime begin/end.
for (const MachineInstr &MI : MBB) {
-
SmallVector<int, 4> slots;
bool IsStart = false;
if (!isLifetimeStartOrEnd(MI, slots, IsStart))
@@ -1047,7 +1060,7 @@
if (WinEHFuncInfo *EHInfo = MF->getWinEHFuncInfo())
for (WinEHTryBlockMapEntry &TBME : EHInfo->TryBlockMap)
for (WinEHHandlerType &H : TBME.HandlerArray)
- if (H.CatchObj.FrameIndex != INT_MAX &&
+ if (H.CatchObj.FrameIndex != std::numeric_limits<int>::max() &&
SlotRemap.count(H.CatchObj.FrameIndex))
H.CatchObj.FrameIndex = SlotRemap[H.CatchObj.FrameIndex];
@@ -1231,7 +1244,7 @@
LiveInterval *Second = &*Intervals[SecondSlot];
auto &FirstS = LiveStarts[FirstSlot];
auto &SecondS = LiveStarts[SecondSlot];
- assert (!First->empty() && !Second->empty() && "Found an empty range");
+ assert(!First->empty() && !Second->empty() && "Found an empty range");
// Merge disjoint slots. This is a little bit tricky - see the
// Implementation Notes section for an explanation.
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index 83c00e2..efd40b2 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1,4 +1,4 @@
-//===-- TwoAddressInstructionPass.cpp - Two-Address instruction pass ------===//
+//===- TwoAddressInstructionPass.cpp - Two-Address instruction pass -------===//
//
// The LLVM Compiler Infrastructure
//
@@ -28,27 +28,40 @@
//===----------------------------------------------------------------------===//
#include "llvm/ADT/DenseMap.h"
-#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/iterator_range.h"
#include "llvm/Analysis/AliasAnalysis.h"
+#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/Passes.h"
-#include "llvm/IR/Function.h"
+#include "llvm/CodeGen/SlotIndexes.h"
+#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrItineraries.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetOpcodes.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
+#include <cassert>
+#include <iterator>
+#include <utility>
using namespace llvm;
@@ -76,6 +89,7 @@
"the benefit of commuting operands"));
namespace {
+
class TwoAddressInstructionPass : public MachineFunctionPass {
MachineFunction *MF;
const TargetInstrInfo *TII;
@@ -148,14 +162,16 @@
void processCopy(MachineInstr *MI);
- typedef SmallVector<std::pair<unsigned, unsigned>, 4> TiedPairList;
- typedef SmallDenseMap<unsigned, TiedPairList> TiedOperandMap;
+ using TiedPairList = SmallVector<std::pair<unsigned, unsigned>, 4>;
+ using TiedOperandMap = SmallDenseMap<unsigned, TiedPairList>;
+
bool collectTiedOperands(MachineInstr *MI, TiedOperandMap&);
void processTiedPairs(MachineInstr *MI, TiedPairList&, unsigned &Dist);
void eliminateRegSequence(MachineBasicBlock::iterator&);
public:
static char ID; // Pass identification, replacement for typeid
+
TwoAddressInstructionPass() : MachineFunctionPass(ID) {
initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry());
}
@@ -175,17 +191,19 @@
/// Pass entry point.
bool runOnMachineFunction(MachineFunction&) override;
};
+
} // end anonymous namespace
char TwoAddressInstructionPass::ID = 0;
+
+char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
+
INITIALIZE_PASS_BEGIN(TwoAddressInstructionPass, DEBUG_TYPE,
"Two-Address instruction pass", false, false)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(TwoAddressInstructionPass, DEBUG_TYPE,
"Two-Address instruction pass", false, false)
-char &llvm::TwoAddressInstructionPassID = TwoAddressInstructionPass::ID;
-
static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS);
/// A two-address instruction has been converted to a three-address instruction
@@ -267,7 +285,7 @@
++KillPos;
unsigned NumVisited = 0;
- for (MachineInstr &OtherMI : llvm::make_range(std::next(OldPos), KillPos)) {
+ for (MachineInstr &OtherMI : make_range(std::next(OldPos), KillPos)) {
// DBG_VALUE cannot be counted against the limit.
if (OtherMI.isDebugValue())
continue;
@@ -452,7 +470,7 @@
LiveIntervals *LIS,
bool allowFalsePositives) {
MachineInstr *DefMI = &MI;
- for (;;) {
+ while (true) {
// All uses of physical registers are likely to be kills.
if (TargetRegisterInfo::isPhysicalRegister(Reg) &&
(allowFalsePositives || MRI->hasOneUse(Reg)))
@@ -904,7 +922,6 @@
// Move the copies connected to MI down as well.
MachineBasicBlock::iterator Begin = MI;
MachineBasicBlock::iterator AfterMI = std::next(Begin);
-
MachineBasicBlock::iterator End = AfterMI;
while (End->isCopy() &&
regOverlapsSet(Defs, End->getOperand(1).getReg(), TRI)) {
@@ -916,7 +933,7 @@
unsigned NumVisited = 0;
MachineBasicBlock::iterator KillPos = KillMI;
++KillPos;
- for (MachineInstr &OtherMI : llvm::make_range(End, KillPos)) {
+ for (MachineInstr &OtherMI : make_range(End, KillPos)) {
// DBG_VALUE cannot be counted against the limit.
if (OtherMI.isDebugValue())
continue;
@@ -1090,7 +1107,7 @@
// Check if the reschedule will not break depedencies.
unsigned NumVisited = 0;
for (MachineInstr &OtherMI :
- llvm::make_range(mi, MachineBasicBlock::iterator(KillMI))) {
+ make_range(mi, MachineBasicBlock::iterator(KillMI))) {
// DBG_VALUE cannot be counted against the limit.
if (OtherMI.isDebugValue())
continue;
@@ -1609,7 +1626,6 @@
if (I->end == UseIdx)
LI.removeSegment(LastCopyIdx, UseIdx);
}
-
} else if (RemovedKillFlag) {
// Some tied uses of regB matched their destination registers, so
// regB is still used in this instruction, but a kill flag was
@@ -1690,7 +1706,7 @@
// transformations that may either eliminate the tied operands or
// improve the opportunities for coalescing away the register copy.
if (TiedOperands.size() == 1) {
- SmallVectorImpl<std::pair<unsigned, unsigned> > &TiedPairs
+ SmallVectorImpl<std::pair<unsigned, unsigned>> &TiedPairs
= TiedOperands.begin()->second;
if (TiedPairs.size() == 1) {
unsigned SrcIdx = TiedPairs[0].first;
@@ -1751,7 +1767,6 @@
///
/// %dst:ssub0<def,undef> = COPY %v1
/// %dst:ssub1<def> = COPY %v2
-///
void TwoAddressInstructionPass::
eliminateRegSequence(MachineBasicBlock::iterator &MBBI) {
MachineInstr &MI = *MBBI;