ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply
Add/Subtract.

The following instructions are added to AArch32 instruction set:

- VQRDMLAH: Vector Saturating Rounding Doubling Multiply Accumulate
            Returning High Half
- VQRDMLSH: Vector Saturating Rounding Doubling Multiply Subtract
            Returning High Half

The following instructions are added to AArch64 instruction set:

- SQRDMLAH: Signed Saturating Rounding Doubling Multiply Accumulate
            Returning High Half
- SQRDMLSH: Signed Saturating Rounding Doubling Multiply Subtract
            Returning High Half

This patch adds intrinsic and ACLE macro support for these instructions,
as well as corresponding tests.

Differential Revision: http://reviews.llvm.org/D14982

llvm-svn: 254250
diff --git a/clang/test/Preprocessor/arm-target-features.c b/clang/test/Preprocessor/arm-target-features.c
index 640cf9e..ae27aa0 100644
--- a/clang/test/Preprocessor/arm-target-features.c
+++ b/clang/test/Preprocessor/arm-target-features.c
@@ -407,4 +407,5 @@
 // CHECK-V81A: __ARM_ARCH 8
 // CHECK-V81A: __ARM_ARCH_8_1A__ 1
 // CHECK-V81A: #define __ARM_ARCH_PROFILE 'A'
+// CHECK-V81A: __ARM_FEATURE_QRDMX 1
 // CHECK-V81A: #define __ARM_FP 0xE