Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.
Eric has replied and has demanded the patch be reverted.
llvm-svn: 247702
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index 9a45a72..6f13993 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -77,7 +77,7 @@
bool parseDirectiveWord(unsigned Size, SMLoc L);
bool is64Bit() const {
- return STI.getTargetTuple().getArch() == TargetTuple::sparcv9;
+ return STI.getTargetTriple().getArch() == Triple::sparcv9;
}
void expandSET(MCInst &Inst, SMLoc IDLoc,
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
index ebcc120..d1d7aaa0 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
@@ -267,11 +267,10 @@
};
class ELFSparcAsmBackend : public SparcAsmBackend {
- TargetTuple::OSType OSType;
-
+ Triple::OSType OSType;
public:
- ELFSparcAsmBackend(const Target &T, TargetTuple::OSType OSType)
- : SparcAsmBackend(T), OSType(OSType) {}
+ ELFSparcAsmBackend(const Target &T, Triple::OSType OSType) :
+ SparcAsmBackend(T), OSType(OSType) { }
void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
uint64_t Value, bool IsPCRel) const override {
@@ -300,7 +299,6 @@
MCAsmBackend *llvm::createSparcAsmBackend(const Target &T,
const MCRegisterInfo &MRI,
- const TargetTuple &TT,
- StringRef CPU) {
+ const Triple &TT, StringRef CPU) {
return new ELFSparcAsmBackend(T, TT.getOS());
}
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
index 80233c8..280c6d7 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
@@ -13,16 +13,16 @@
#include "SparcMCAsmInfo.h"
#include "SparcMCExpr.h"
-#include "llvm/ADT/TargetTuple.h"
+#include "llvm/ADT/Triple.h"
#include "llvm/MC/MCStreamer.h"
using namespace llvm;
void SparcELFMCAsmInfo::anchor() {}
-SparcELFMCAsmInfo::SparcELFMCAsmInfo(const TargetTuple &TT) {
- bool isV9 = (TT.getArch() == TargetTuple::sparcv9);
- IsLittleEndian = (TT.getArch() == TargetTuple::sparcel);
+SparcELFMCAsmInfo::SparcELFMCAsmInfo(const Triple &TheTriple) {
+ bool isV9 = (TheTriple.getArch() == Triple::sparcv9);
+ IsLittleEndian = (TheTriple.getArch() == Triple::sparcel);
if (isV9) {
PointerSize = CalleeSaveStackSlotSize = 8;
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
index 29db112..ad44122 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
@@ -17,13 +17,13 @@
#include "llvm/MC/MCAsmInfoELF.h"
namespace llvm {
-class TargetTuple;
+class Triple;
class SparcELFMCAsmInfo : public MCAsmInfoELF {
void anchor() override;
public:
- explicit SparcELFMCAsmInfo(const TargetTuple &TT);
+ explicit SparcELFMCAsmInfo(const Triple &TheTriple);
const MCExpr*
getExprForPersonalitySymbol(const MCSymbol *Sym, unsigned Encoding,
MCStreamer &Streamer) const override;
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
index 79c91c4..9113e4a 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
@@ -34,7 +34,7 @@
#include "SparcGenRegisterInfo.inc"
static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
- const TargetTuple &TT) {
+ const Triple &TT) {
MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
@@ -43,7 +43,7 @@
}
static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
- const TargetTuple &TT) {
+ const Triple &TT) {
MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 2047);
@@ -57,16 +57,16 @@
return X;
}
-static MCRegisterInfo *createSparcMCRegisterInfo(const TargetTuple &TT) {
+static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) {
MCRegisterInfo *X = new MCRegisterInfo();
InitSparcMCRegisterInfo(X, SP::O7);
return X;
}
static MCSubtargetInfo *
-createSparcMCSubtargetInfo(const TargetTuple &TT, StringRef CPU, StringRef FS) {
+createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
if (CPU.empty())
- CPU = (TT.getArch() == TargetTuple::sparcv9) ? "v9" : "v8";
+ CPU = (TT.getArch() == Triple::sparcv9) ? "v9" : "v8";
return createSparcMCSubtargetInfoImpl(TT, CPU, FS);
}
@@ -81,7 +81,7 @@
//
// All code models require that the text segment is smaller than 2GB.
-static MCCodeGenInfo *createSparcMCCodeGenInfo(const TargetTuple &TT,
+static MCCodeGenInfo *createSparcMCCodeGenInfo(const Triple &TT,
Reloc::Model RM,
CodeModel::Model CM,
CodeGenOpt::Level OL) {
@@ -99,7 +99,7 @@
return X;
}
-static MCCodeGenInfo *createSparcV9MCCodeGenInfo(const TargetTuple &TT,
+static MCCodeGenInfo *createSparcV9MCCodeGenInfo(const Triple &TT,
Reloc::Model RM,
CodeModel::Model CM,
CodeGenOpt::Level OL) {
@@ -133,7 +133,7 @@
return new SparcTargetAsmStreamer(S, OS);
}
-static MCInstPrinter *createSparcMCInstPrinter(const TargetTuple &TT,
+static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI,
const MCInstrInfo &MII,
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
index dc97957..a9c9f15 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h
@@ -25,7 +25,7 @@
class MCRegisterInfo;
class MCSubtargetInfo;
class Target;
-class TargetTuple;
+class Triple;
class StringRef;
class raw_pwrite_stream;
class raw_ostream;
@@ -38,7 +38,7 @@
const MCRegisterInfo &MRI,
MCContext &Ctx);
MCAsmBackend *createSparcAsmBackend(const Target &T, const MCRegisterInfo &MRI,
- const TargetTuple &TT, StringRef CPU);
+ const Triple &TT, StringRef CPU);
MCObjectWriter *createSparcELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit,
bool IsLIttleEndian, uint8_t OSABI);
} // End llvm namespace
diff --git a/llvm/lib/Target/Sparc/SparcSubtarget.cpp b/llvm/lib/Target/Sparc/SparcSubtarget.cpp
index 7c05ea7..d701594 100644
--- a/llvm/lib/Target/Sparc/SparcSubtarget.cpp
+++ b/llvm/lib/Target/Sparc/SparcSubtarget.cpp
@@ -52,7 +52,7 @@
SparcSubtarget::SparcSubtarget(const Triple &TT, const std::string &CPU,
const std::string &FS, TargetMachine &TM,
bool is64Bit)
- : SparcGenSubtargetInfo(TargetTuple(TT), CPU, FS), Is64Bit(is64Bit),
+ : SparcGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit),
InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
FrameLowering(*this) {}