Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.
Eric has replied and has demanded the patch be reverted.
llvm-svn: 247702
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
index a8cb808..2e353cb 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmInstrumentation.cpp
@@ -1068,8 +1068,8 @@
X86AsmInstrumentation *
CreateX86AsmInstrumentation(const MCTargetOptions &MCOptions,
const MCContext &Ctx, const MCSubtargetInfo &STI) {
- const TargetTuple &TT = STI.getTargetTuple();
- const bool hasCompilerRTSupport = TT.isOSLinux();
+ Triple T(STI.getTargetTriple());
+ const bool hasCompilerRTSupport = T.isOSLinux();
if (ClAsanInstrumentAssembly && hasCompilerRTSupport &&
MCOptions.SanitizeAddress) {
if (STI.getFeatureBits()[X86::Mode32Bit] != 0)
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index dc2b07c..629802f 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -771,36 +771,36 @@
MCAsmBackend *llvm::createX86_32AsmBackend(const Target &T,
const MCRegisterInfo &MRI,
- const TargetTuple &TT,
+ const Triple &TheTriple,
StringRef CPU) {
- if (TT.isOSBinFormatMachO())
+ if (TheTriple.isOSBinFormatMachO())
return new DarwinX86_32AsmBackend(T, MRI, CPU);
- if (TT.isOSWindows() && !TT.isOSBinFormatELF())
+ if (TheTriple.isOSWindows() && !TheTriple.isOSBinFormatELF())
return new WindowsX86AsmBackend(T, false, CPU);
- uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
+ uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS());
return new ELFX86_32AsmBackend(T, OSABI, CPU);
}
MCAsmBackend *llvm::createX86_64AsmBackend(const Target &T,
const MCRegisterInfo &MRI,
- const TargetTuple &TT,
+ const Triple &TheTriple,
StringRef CPU) {
- if (TT.isOSBinFormatMachO()) {
+ if (TheTriple.isOSBinFormatMachO()) {
MachO::CPUSubTypeX86 CS =
- StringSwitch<MachO::CPUSubTypeX86>(TT.getArchName())
+ StringSwitch<MachO::CPUSubTypeX86>(TheTriple.getArchName())
.Case("x86_64h", MachO::CPU_SUBTYPE_X86_64_H)
.Default(MachO::CPU_SUBTYPE_X86_64_ALL);
return new DarwinX86_64AsmBackend(T, MRI, CPU, CS);
}
- if (TT.isOSWindows() && !TT.isOSBinFormatELF())
+ if (TheTriple.isOSWindows() && !TheTriple.isOSBinFormatELF())
return new WindowsX86AsmBackend(T, true, CPU);
- uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
+ uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TheTriple.getOS());
- if (TT.getEnvironment() == TargetTuple::GNUX32)
+ if (TheTriple.getEnvironment() == Triple::GNUX32)
return new ELFX86_X32AsmBackend(T, OSABI, CPU);
return new ELFX86_64AsmBackend(T, OSABI, CPU);
}
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
index 2208d9c..fc0b0f8 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
@@ -12,7 +12,7 @@
//===----------------------------------------------------------------------===//
#include "X86MCAsmInfo.h"
-#include "llvm/ADT/TargetTuple.h"
+#include "llvm/ADT/Triple.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCSectionELF.h"
@@ -41,8 +41,8 @@
void X86MCAsmInfoDarwin::anchor() { }
-X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(const TargetTuple &TT) {
- bool is64Bit = TT.getArch() == TargetTuple::x86_64;
+X86MCAsmInfoDarwin::X86MCAsmInfoDarwin(const Triple &T) {
+ bool is64Bit = T.getArch() == Triple::x86_64;
if (is64Bit)
PointerSize = CalleeSaveStackSlotSize = 8;
@@ -69,7 +69,7 @@
// old assembler lacks some directives
// FIXME: this should really be a check on the assembler characteristics
// rather than OS version
- if (TT.isMacOSX() && TT.isMacOSXVersionLT(10, 6))
+ if (T.isMacOSX() && T.isMacOSXVersionLT(10, 6))
HasWeakDefCanBeHiddenDirective = false;
// Assume ld64 is new enough that the abs-ified FDE relocs may be used
@@ -80,14 +80,15 @@
UseIntegratedAssembler = true;
}
-X86_64MCAsmInfoDarwin::X86_64MCAsmInfoDarwin(const TargetTuple &TT)
- : X86MCAsmInfoDarwin(TT) {}
+X86_64MCAsmInfoDarwin::X86_64MCAsmInfoDarwin(const Triple &Triple)
+ : X86MCAsmInfoDarwin(Triple) {
+}
void X86ELFMCAsmInfo::anchor() { }
-X86ELFMCAsmInfo::X86ELFMCAsmInfo(const TargetTuple &TT) {
- bool is64Bit = TT.getArch() == TargetTuple::x86_64;
- bool isX32 = TT.getEnvironment() == TargetTuple::GNUX32;
+X86ELFMCAsmInfo::X86ELFMCAsmInfo(const Triple &T) {
+ bool is64Bit = T.getArch() == Triple::x86_64;
+ bool isX32 = T.getEnvironment() == Triple::GNUX32;
// For ELF, x86-64 pointer size depends on the ABI.
// For x86-64 without the x32 ABI, pointer size is 8. For x86 and for x86-64
@@ -125,8 +126,8 @@
void X86MCAsmInfoMicrosoft::anchor() { }
-X86MCAsmInfoMicrosoft::X86MCAsmInfoMicrosoft(const TargetTuple &TT) {
- if (TT.getArch() == TargetTuple::x86_64) {
+X86MCAsmInfoMicrosoft::X86MCAsmInfoMicrosoft(const Triple &Triple) {
+ if (Triple.getArch() == Triple::x86_64) {
PrivateGlobalPrefix = ".L";
PrivateLabelPrefix = ".L";
PointerSize = 8;
@@ -151,9 +152,9 @@
void X86MCAsmInfoGNUCOFF::anchor() { }
-X86MCAsmInfoGNUCOFF::X86MCAsmInfoGNUCOFF(const TargetTuple &TT) {
- assert(TT.isOSWindows() && "Windows is the only supported COFF target");
- if (TT.getArch() == TargetTuple::x86_64) {
+X86MCAsmInfoGNUCOFF::X86MCAsmInfoGNUCOFF(const Triple &Triple) {
+ assert(Triple.isOSWindows() && "Windows is the only supported COFF target");
+ if (Triple.getArch() == Triple::x86_64) {
PrivateGlobalPrefix = ".L";
PrivateLabelPrefix = ".L";
PointerSize = 8;
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
index 8bb860e..30d5c80 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.h
@@ -20,17 +20,17 @@
#include "llvm/MC/MCAsmInfoELF.h"
namespace llvm {
-class TargetTuple;
+class Triple;
class X86MCAsmInfoDarwin : public MCAsmInfoDarwin {
virtual void anchor();
public:
- explicit X86MCAsmInfoDarwin(const TargetTuple &TT);
+ explicit X86MCAsmInfoDarwin(const Triple &Triple);
};
struct X86_64MCAsmInfoDarwin : public X86MCAsmInfoDarwin {
- explicit X86_64MCAsmInfoDarwin(const TargetTuple &TT);
+ explicit X86_64MCAsmInfoDarwin(const Triple &Triple);
const MCExpr *
getExprForPersonalitySymbol(const MCSymbol *Sym, unsigned Encoding,
MCStreamer &Streamer) const override;
@@ -40,21 +40,21 @@
void anchor() override;
public:
- explicit X86ELFMCAsmInfo(const TargetTuple &TT);
+ explicit X86ELFMCAsmInfo(const Triple &Triple);
};
class X86MCAsmInfoMicrosoft : public MCAsmInfoMicrosoft {
void anchor() override;
public:
- explicit X86MCAsmInfoMicrosoft(const TargetTuple &TT);
+ explicit X86MCAsmInfoMicrosoft(const Triple &Triple);
};
class X86MCAsmInfoGNUCOFF : public MCAsmInfoGNUCOFF {
void anchor() override;
public:
- explicit X86MCAsmInfoGNUCOFF(const TargetTuple &TT);
+ explicit X86MCAsmInfoGNUCOFF(const Triple &Triple);
};
} // namespace llvm
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
index 9ece4ee..7a453fe 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
@@ -15,7 +15,7 @@
#include "InstPrinter/X86ATTInstPrinter.h"
#include "InstPrinter/X86IntelInstPrinter.h"
#include "X86MCAsmInfo.h"
-#include "llvm/ADT/TargetTuple.h"
+#include "llvm/ADT/Triple.h"
#include "llvm/MC/MCCodeGenInfo.h"
#include "llvm/MC/MCInstrAnalysis.h"
#include "llvm/MC/MCInstrInfo.h"
@@ -42,11 +42,11 @@
#define GET_SUBTARGETINFO_MC_DESC
#include "X86GenSubtargetInfo.inc"
-std::string X86_MC::ParseX86TargetTuple(const TargetTuple &TT) {
+std::string X86_MC::ParseX86Triple(const Triple &TT) {
std::string FS;
- if (TT.getArch() == TargetTuple::x86_64)
+ if (TT.getArch() == Triple::x86_64)
FS = "+64bit-mode,-32bit-mode,-16bit-mode";
- else if (TT.getEnvironment() != TargetTuple::CODE16)
+ else if (TT.getEnvironment() != Triple::CODE16)
FS = "-64bit-mode,+32bit-mode,-16bit-mode";
else
FS = "-64bit-mode,-32bit-mode,+16bit-mode";
@@ -54,8 +54,8 @@
return FS;
}
-unsigned X86_MC::getDwarfRegFlavour(const TargetTuple &TT, bool isEH) {
- if (TT.getArch() == TargetTuple::x86_64)
+unsigned X86_MC::getDwarfRegFlavour(const Triple &TT, bool isEH) {
+ if (TT.getArch() == Triple::x86_64)
return DWARFFlavour::X86_64;
if (TT.isOSDarwin())
@@ -74,9 +74,9 @@
}
}
-MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(const TargetTuple &TT,
+MCSubtargetInfo *X86_MC::createX86MCSubtargetInfo(const Triple &TT,
StringRef CPU, StringRef FS) {
- std::string ArchFS = X86_MC::ParseX86TargetTuple(TT);
+ std::string ArchFS = X86_MC::ParseX86Triple(TT);
if (!FS.empty()) {
if (!ArchFS.empty())
ArchFS = (Twine(ArchFS) + "," + FS).str();
@@ -97,8 +97,8 @@
return X;
}
-static MCRegisterInfo *createX86MCRegisterInfo(const TargetTuple &TT) {
- unsigned RA = (TT.getArch() == TargetTuple::x86_64)
+static MCRegisterInfo *createX86MCRegisterInfo(const Triple &TT) {
+ unsigned RA = (TT.getArch() == Triple::x86_64)
? X86::RIP // Should have dwarf #16.
: X86::EIP; // Should have dwarf #8.
@@ -110,26 +110,27 @@
}
static MCAsmInfo *createX86MCAsmInfo(const MCRegisterInfo &MRI,
- const TargetTuple &TT) {
- bool is64Bit = TT.getArch() == TargetTuple::x86_64;
+ const Triple &TheTriple) {
+ bool is64Bit = TheTriple.getArch() == Triple::x86_64;
MCAsmInfo *MAI;
- if (TT.isOSBinFormatMachO()) {
+ if (TheTriple.isOSBinFormatMachO()) {
if (is64Bit)
- MAI = new X86_64MCAsmInfoDarwin(TT);
+ MAI = new X86_64MCAsmInfoDarwin(TheTriple);
else
- MAI = new X86MCAsmInfoDarwin(TT);
- } else if (TT.isOSBinFormatELF()) {
+ MAI = new X86MCAsmInfoDarwin(TheTriple);
+ } else if (TheTriple.isOSBinFormatELF()) {
// Force the use of an ELF container.
- MAI = new X86ELFMCAsmInfo(TT);
- } else if (TT.isWindowsMSVCEnvironment() ||
- TT.isWindowsCoreCLREnvironment()) {
- MAI = new X86MCAsmInfoMicrosoft(TT);
- } else if (TT.isOSCygMing() || TT.isWindowsItaniumEnvironment()) {
- MAI = new X86MCAsmInfoGNUCOFF(TT);
+ MAI = new X86ELFMCAsmInfo(TheTriple);
+ } else if (TheTriple.isWindowsMSVCEnvironment() ||
+ TheTriple.isWindowsCoreCLREnvironment()) {
+ MAI = new X86MCAsmInfoMicrosoft(TheTriple);
+ } else if (TheTriple.isOSCygMing() ||
+ TheTriple.isWindowsItaniumEnvironment()) {
+ MAI = new X86MCAsmInfoGNUCOFF(TheTriple);
} else {
// The default is ELF.
- MAI = new X86ELFMCAsmInfo(TT);
+ MAI = new X86ELFMCAsmInfo(TheTriple);
}
// Initialize initial frame state.
@@ -151,13 +152,12 @@
return MAI;
}
-static MCCodeGenInfo *createX86MCCodeGenInfo(const TargetTuple &TT,
- Reloc::Model RM,
+static MCCodeGenInfo *createX86MCCodeGenInfo(const Triple &TT, Reloc::Model RM,
CodeModel::Model CM,
CodeGenOpt::Level OL) {
MCCodeGenInfo *X = new MCCodeGenInfo();
- bool is64Bit = TT.getArch() == TargetTuple::x86_64;
+ bool is64Bit = TT.getArch() == Triple::x86_64;
if (RM == Reloc::Default) {
// Darwin defaults to PIC in 64 bit mode and dynamic-no-pic in 32 bit mode.
@@ -201,7 +201,7 @@
return X;
}
-static MCInstPrinter *createX86MCInstPrinter(const TargetTuple &TT,
+static MCInstPrinter *createX86MCInstPrinter(const Triple &T,
unsigned SyntaxVariant,
const MCAsmInfo &MAI,
const MCInstrInfo &MII,
@@ -213,14 +213,14 @@
return nullptr;
}
-static MCRelocationInfo *createX86MCRelocationInfo(const TargetTuple &TT,
+static MCRelocationInfo *createX86MCRelocationInfo(const Triple &TheTriple,
MCContext &Ctx) {
- if (TT.isOSBinFormatMachO() && TT.getArch() == TargetTuple::x86_64)
+ if (TheTriple.isOSBinFormatMachO() && TheTriple.getArch() == Triple::x86_64)
return createX86_64MachORelocationInfo(Ctx);
- else if (TT.isOSBinFormatELF())
+ else if (TheTriple.isOSBinFormatELF())
return createX86_64ELFRelocationInfo(Ctx);
// Default to the stock relocation info.
- return llvm::createMCRelocationInfo(TT, Ctx);
+ return llvm::createMCRelocationInfo(TheTriple, Ctx);
}
static MCInstrAnalysis *createX86MCInstrAnalysis(const MCInstrInfo *Info) {
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
index 18a6e26..6221bab 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCTargetDesc.h
@@ -28,7 +28,7 @@
class MCRelocationInfo;
class MCStreamer;
class Target;
-class TargetTuple;
+class Triple;
class StringRef;
class raw_ostream;
class raw_pwrite_stream;
@@ -52,15 +52,15 @@
}
namespace X86_MC {
-std::string ParseX86TargetTuple(const TargetTuple &TT);
+std::string ParseX86Triple(const Triple &TT);
-unsigned getDwarfRegFlavour(const TargetTuple &TT, bool isEH);
+unsigned getDwarfRegFlavour(const Triple &TT, bool isEH);
void InitLLVM2SEHRegisterMapping(MCRegisterInfo *MRI);
/// Create a X86 MCSubtargetInfo instance. This is exposed so Asm parser, etc.
/// do not need to go through TargetRegistry.
-MCSubtargetInfo *createX86MCSubtargetInfo(const TargetTuple &TT, StringRef CPU,
+MCSubtargetInfo *createX86MCSubtargetInfo(const Triple &TT, StringRef CPU,
StringRef FS);
}
@@ -69,9 +69,9 @@
MCContext &Ctx);
MCAsmBackend *createX86_32AsmBackend(const Target &T, const MCRegisterInfo &MRI,
- const TargetTuple &TT, StringRef CPU);
+ const Triple &TT, StringRef CPU);
MCAsmBackend *createX86_64AsmBackend(const Target &T, const MCRegisterInfo &MRI,
- const TargetTuple &TT, StringRef CPU);
+ const Triple &TT, StringRef CPU);
/// Construct an X86 Windows COFF machine code streamer which will generate
/// PE/COFF format object files.
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 57f4c99..7b04e81 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -50,8 +50,8 @@
X86RegisterInfo::X86RegisterInfo(const Triple &TT)
: X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP),
- X86_MC::getDwarfRegFlavour(TargetTuple(TT), false),
- X86_MC::getDwarfRegFlavour(TargetTuple(TT), true),
+ X86_MC::getDwarfRegFlavour(TT, false),
+ X86_MC::getDwarfRegFlavour(TT, true),
(TT.isArch64Bit() ? X86::RIP : X86::EIP)) {
X86_MC::InitLLVM2SEHRegisterMapping(this);
diff --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp
index 111e12b..5b53ca9 100644
--- a/llvm/lib/Target/X86/X86Subtarget.cpp
+++ b/llvm/lib/Target/X86/X86Subtarget.cpp
@@ -290,7 +290,7 @@
X86Subtarget::X86Subtarget(const Triple &TT, const std::string &CPU,
const std::string &FS, const X86TargetMachine &TM,
unsigned StackAlignOverride)
- : X86GenSubtargetInfo(TargetTuple(TT), CPU, FS), X86ProcFamily(Others),
+ : X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
PICStyle(PICStyles::None), TargetTriple(TT),
StackAlignOverride(StackAlignOverride),
In64BitMode(TargetTriple.getArch() == Triple::x86_64),