commit 5118c68cde1ab1a70ca61e3e75cab48653dfd5b9
author Dorit Nuzman <dorit.nuzman@intel.com> Sun Oct 14 07:21:20 2018 +0000
committer Dorit Nuzman <dorit.nuzman@intel.com> Sun Oct 14 07:21:20 2018 +0000
tree 5f8d90a57ed707983d11e85947c36f607e00272f
parent 8174368955177c0765977996b00a0184921d5420

revert  344472 due to failures.

llvm-svn: 344473

llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp

diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
index 2c81661..b0da9b5 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -473,12 +473,7 @@
                                            unsigned Factor,
                                            ArrayRef<unsigned> Indices,
                                            unsigned Alignment,
-                                           unsigned AddressSpace,
-                                           Bool IsMasked) {
-  if (IsMasked)
-    return BaseT::getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
-                                             Alignment, AddressSpace, IsMasked);
-
+                                           unsigned AddressSpace) {
   assert(isa<VectorType>(VecTy) &&
          "Expect a vector type for interleaved memory op");