commit 51f9f774948216b56a5a0a763f52c1cbdd260a32
author Matt Arsenault <Matthew.Arsenault@amd.com> Mon Oct 21 20:03:58 2013 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Mon Oct 21 20:03:58 2013 +0000
tree 3b5485d16974340b82edb1b50b888388851f24f2
parent b768912db853b13b148a388f0dd03ecaa80ae785

Fix CodeGen for vectors of pointers with address spaces.

llvm-svn: 193112

llvm/test/CodeGen/R600/gep-address-space.ll

diff --git a/llvm/test/CodeGen/R600/gep-address-space.ll b/llvm/test/CodeGen/R600/gep-address-space.ll
index 6c67ed4..934b5a5 100644
--- a/llvm/test/CodeGen/R600/gep-address-space.ll
+++ b/llvm/test/CodeGen/R600/gep-address-space.ll
@@ -8,3 +8,33 @@
   ret void
 }
 
+define void @gep_as_vector_v4(<4 x [1024 x i32] addrspace(3)*> %array) nounwind {
+; CHECK-LABEL: @gep_as_vector_v4:
+; CHECK: V_ADD_I32
+; CHECK: V_ADD_I32
+; CHECK: V_ADD_I32
+; CHECK: V_ADD_I32
+  %p = getelementptr <4 x [1024 x i32] addrspace(3)*> %array, <4 x i16> zeroinitializer, <4 x i16> <i16 16, i16 16, i16 16, i16 16>
+  %p0 = extractelement <4 x i32 addrspace(3)*> %p, i32 0
+  %p1 = extractelement <4 x i32 addrspace(3)*> %p, i32 1
+  %p2 = extractelement <4 x i32 addrspace(3)*> %p, i32 2
+  %p3 = extractelement <4 x i32 addrspace(3)*> %p, i32 3
+  store i32 99, i32 addrspace(3)* %p0
+  store i32 99, i32 addrspace(3)* %p1
+  store i32 99, i32 addrspace(3)* %p2
+  store i32 99, i32 addrspace(3)* %p3
+  ret void
+}
+
+define void @gep_as_vector_v2(<2 x [1024 x i32] addrspace(3)*> %array) nounwind {
+; CHECK-LABEL: @gep_as_vector_v2:
+; CHECK: V_ADD_I32
+; CHECK: V_ADD_I32
+  %p = getelementptr <2 x [1024 x i32] addrspace(3)*> %array, <2 x i16> zeroinitializer, <2 x i16> <i16 16, i16 16>
+  %p0 = extractelement <2 x i32 addrspace(3)*> %p, i32 0
+  %p1 = extractelement <2 x i32 addrspace(3)*> %p, i32 1
+  store i32 99, i32 addrspace(3)* %p0
+  store i32 99, i32 addrspace(3)* %p1
+  ret void
+}
+