commit	52500216727e39fa90b33d914e93338c88b0abeb	[log] [tgz]
author	Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>	Sun Jun 16 17:13:09 2019 +0000
committer	Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>	Sun Jun 16 17:13:09 2019 +0000
tree	f86e334dba0b0d62b25aef7b0329d0b934593af7
parent	e20b388e2f923bfc98f63a13fea9fc19aeaec425 [diff]

[AMDGPU] gfx10 conditional registers handling

This is cpp source part of wave32 support, excluding overriden
getRegClass().

Differential Revision: https://reviews.llvm.org/D63351

llvm-svn: 363513

llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp[diff]
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h[diff]
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp[diff]
llvm/lib/Target/AMDGPU/SIISelLowering.cpp[diff]
llvm/lib/Target/AMDGPU/SIInsertSkips.cpp[diff]
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp[diff]
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp[diff]
llvm/lib/Target/AMDGPU/SIInstrInfo.h[diff]
llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp[diff]
llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp[diff]
llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp[diff]
llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp[diff]
llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp[diff]
llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp[diff]
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp[diff]
llvm/lib/Target/AMDGPU/SIRegisterInfo.h[diff]
llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp[diff]
llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp[diff]
llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir[diff]

19 files changed

tree: f86e334dba0b0d62b25aef7b0329d0b934593af7

clang/
clang-tools-extra/
compiler-rt/
debuginfo-tests/
libclc/
libcxx/
libcxxabi/
libunwind/
lld/
lldb/
llgo/
llvm/
openmp/
parallel-libs/
polly/
pstl/
.arcconfig
.clang-format
.clang-tidy
.gitignore
README.md

README.md

The LLVM Compiler Infrastructure

This directory and its subdirectories contain source code for LLVM, a toolkit for the construction of highly optimized compilers, optimizers, and runtime environments.