[Clang][BuiltIn][AVX512] Adding intrinsics fot align{d|q} and palignr instruction set
Differential Revision: http://reviews.llvm.org/D19588
llvm-svn: 267876
diff --git a/clang/lib/Headers/avx512bwintrin.h b/clang/lib/Headers/avx512bwintrin.h
index e0307cd..4f451df 100644
--- a/clang/lib/Headers/avx512bwintrin.h
+++ b/clang/lib/Headers/avx512bwintrin.h
@@ -2168,6 +2168,29 @@
(__mmask32) __M);
}
+#define _mm512_alignr_epi8( __A, __B, __N) __extension__ ({\
+__builtin_ia32_palignr512_mask ((__v8di) __A,\
+ (__v8di) __B ,__N * 8,\
+ (__v8di) _mm512_undefined_pd (),\
+ (__mmask64) -1);\
+})
+
+#define _mm512_mask_alignr_epi8( __W, __U, __A, __B, __N) __extension__({\
+__builtin_ia32_palignr512_mask ((__v8di) __A,\
+ (__v8di) __B,\
+ __N * 8,\
+ (__v8di) __W,\
+ (__mmask64) __U);\
+})
+
+#define _mm512_maskz_alignr_epi8( __U, __A, __B, __N) __extension__({\
+__builtin_ia32_palignr512_mask ((__v8di) __A,\
+ (__v8di) __B,\
+ __N * 8,\
+ (__v8di) _mm512_setzero_si512 (),\
+ (__mmask64) __U);\
+})
+
#undef __DEFAULT_FN_ATTRS
#endif
diff --git a/clang/lib/Headers/avx512fintrin.h b/clang/lib/Headers/avx512fintrin.h
index 38d2ccb..8440258 100644
--- a/clang/lib/Headers/avx512fintrin.h
+++ b/clang/lib/Headers/avx512fintrin.h
@@ -2550,12 +2550,40 @@
(I), (__v8di)_mm512_setzero_si512(), \
(__mmask8)-1); })
+#define _mm512_mask_alignr_epi64( __W, __U, __A, __B, __imm) __extension__({\
+ (__m512i)__builtin_ia32_alignq512_mask ((__v8di) __A,\
+ (__v8di) __B, __imm,\
+ (__v8di) __W,\
+ (__mmask8) __U);\
+})
+
+#define _mm512_maskz_alignr_epi64( __U, __A, __B, __imm) __extension__({\
+ (__m512i)__builtin_ia32_alignq512_mask ((__v8di) __A,\
+ (__v8di) __B, __imm,\
+ (__v8di) _mm512_setzero_si512 (),\
+ (__mmask8) __U);\
+})
+
#define _mm512_alignr_epi32(A, B, I) __extension__ ({ \
- (__m512i)__builtin_ia32_alignd512_mask((__v16si)(__m512i)(A), \
+ (__m512i)__builtin_ia32_alignd512_mask((__v16si)(__m512i)(A), \
(__v16si)(__m512i)(B), \
(I), (__v16si)_mm512_setzero_si512(), \
- (__mmask16)-1); })
+ (__mmask16)-1);\
+})
+
+#define _mm512_mask_alignr_epi32( __W, __U, __A, __B, __imm) __extension__ ({\
+ (__m512i) __builtin_ia32_alignd512_mask((__v16si) __A,\
+ (__v16si) __B, __imm,\
+ (__v16si) __W,\
+ (__mmask16) __U);\
+})
+#define _mm512_maskz_alignr_epi32( __U, __A, __B, __imm) __extension__({\
+ (__m512i) __builtin_ia32_alignd512_mask ((__v16si) __A,\
+ (__v16si) __B, __imm,\
+ (__v16si) _mm512_setzero_si512 (),\
+ (__mmask16) __U);\
+})
/* Vector Extract */
#define _mm512_extractf64x4_pd(A, I) __extension__ ({ \
diff --git a/clang/lib/Headers/avx512vlbwintrin.h b/clang/lib/Headers/avx512vlbwintrin.h
index 361df93..bee20aa 100644
--- a/clang/lib/Headers/avx512vlbwintrin.h
+++ b/clang/lib/Headers/avx512vlbwintrin.h
@@ -3358,6 +3358,40 @@
(__mmask16) __M);
}
+#define _mm_mask_alignr_epi8( __W, __U, __A, __B, __N) __extension__ ({ \
+__builtin_ia32_palignr128_mask ((__v2di)( __A),\
+ (__v2di)( __B),\
+ ( __N) * 8,\
+ (__v2di)( __W),\
+ (__mmask16)( __U));\
+})
+
+#define _mm_maskz_alignr_epi8( __U, __A, __B, __N) __extension__ ({ \
+__builtin_ia32_palignr128_mask ((__v2di)( __A),\
+ (__v2di)( __B),\
+ ( __N) * 8,\
+ (__v2di)\
+ _mm_setzero_si128 (),\
+ (__mmask16)( __U));\
+})
+
+#define _mm256_mask_alignr_epi8( __W, __U, __A, __B, __N) __extension__ ({ \
+__builtin_ia32_palignr256_mask ((__v4di)( __A),\
+ (__v4di)( __B),\
+ ( __N) * 8,\
+ (__v4di)( __W),\
+ (__mmask32)( __U));\
+})
+
+#define _mm256_maskz_alignr_epi8( __U, __A, __B, __N) __extension__ ({ \
+__builtin_ia32_palignr256_mask ((__v4di)( __A),\
+ (__v4di)( __B),\
+ ( __N) * 8,\
+ (__v4di)\
+ _mm256_setzero_si256 (),\
+ (__mmask32)( __U));\
+})
+
#undef __DEFAULT_FN_ATTRS
#endif /* __AVX512VLBWINTRIN_H */
diff --git a/clang/lib/Headers/avx512vlintrin.h b/clang/lib/Headers/avx512vlintrin.h
index 77d98b8..60c2fbe 100644
--- a/clang/lib/Headers/avx512vlintrin.h
+++ b/clang/lib/Headers/avx512vlintrin.h
@@ -9209,6 +9209,90 @@
(__mmask8) -1);
}
+#define _mm_alignr_epi32( __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd128_mask ((__v4si)( __A),\
+ (__v4si)( __B),( __imm),\
+ (__v4si) _mm_undefined_si128 (),\
+ (__mmask8) -1);\
+})
+
+#define _mm_mask_alignr_epi32( __W, __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd128_mask ((__v4si)( __A),\
+ (__v4si)( __B),( __imm),\
+ (__v4si)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm_maskz_alignr_epi32( __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd128_mask ((__v4si)( __A),\
+ (__v4si)( __B),( __imm),\
+ (__v4si) _mm_setzero_si128 (),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_alignr_epi32( __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd256_mask ((__v8si)( __A),\
+ (__v8si)( __B),( __imm),\
+ (__v8si) _mm256_undefined_si256 (),\
+ (__mmask8) -1);\
+})
+
+#define _mm256_mask_alignr_epi32( __W, __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd256_mask ((__v8si)( __A),\
+ (__v8si)( __B),( __imm),\
+ (__v8si)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_maskz_alignr_epi32( __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignd256_mask ((__v8si)( __A),\
+ (__v8si)( __B),( __imm),\
+ (__v8si) _mm256_setzero_si256 (),\
+ (__mmask8)( __U));\
+})
+
+#define _mm_alignr_epi64( __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq128_mask ((__v2di)( __A),\
+ (__v2di)( __B),( __imm),\
+ (__v2di) _mm_setzero_di (),\
+ (__mmask8) -1);\
+})
+
+#define _mm_mask_alignr_epi64( __W, __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq128_mask ((__v2di)( __A),\
+ (__v2di)( __B),( __imm),\
+ (__v2di)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm_maskz_alignr_epi64( __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq128_mask ((__v2di)( __A),\
+ (__v2di)( __B),( __imm),\
+ (__v2di) _mm_setzero_di (),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_alignr_epi64( __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq256_mask ((__v4di)( __A),\
+ (__v4di)( __B),( __imm),\
+ (__v4di) _mm256_undefined_pd (),\
+ (__mmask8) -1);\
+})
+
+#define _mm256_mask_alignr_epi64( __W, __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq256_mask ((__v4di)( __A),\
+ (__v4di)( __B),( __imm),\
+ (__v4di)( __W),\
+ (__mmask8)( __U));\
+})
+
+#define _mm256_maskz_alignr_epi64( __U, __A, __B, __imm) __extension__ ({ \
+__builtin_ia32_alignq256_mask ((__v4di)( __A),\
+ (__v4di)( __B),( __imm),\
+ (__v4di) _mm256_setzero_si256 (),\
+ (__mmask8)( __U));\
+})
+
#undef __DEFAULT_FN_ATTRS
#undef __DEFAULT_FN_ATTRS_BOTH