MC: Emit COFF section flags in the "proper" order
COFF section flags are not idempotent:
'rd' will make a read-write section because 'd' implies write
'dr' will make a read-only section because 'r' disables write
llvm-svn: 228490
diff --git a/llvm/test/CodeGen/X86/coff-comdat.ll b/llvm/test/CodeGen/X86/coff-comdat.ll
index dcbbe10..44e1cb2 100644
--- a/llvm/test/CodeGen/X86/coff-comdat.ll
+++ b/llvm/test/CodeGen/X86/coff-comdat.ll
@@ -73,20 +73,20 @@
; CHECK: .globl @v8@0
; CHECK: .section .text,"xr",discard,@f8@0
; CHECK: .globl @f8@0
-; CHECK: .section .bss,"wb",associative,_f1
+; CHECK: .section .bss,"bw",associative,_f1
; CHECK: .globl _v1
-; CHECK: .section .bss,"wb",associative,_f2
+; CHECK: .section .bss,"bw",associative,_f2
; CHECK: .globl _v2
-; CHECK: .section .bss,"wb",associative,_f3
+; CHECK: .section .bss,"bw",associative,_f3
; CHECK: .globl _v3
-; CHECK: .section .bss,"wb",associative,_f4
+; CHECK: .section .bss,"bw",associative,_f4
; CHECK: .globl _v4
-; CHECK: .section .bss,"wb",associative,_f5
+; CHECK: .section .bss,"bw",associative,_f5
; CHECK: .globl _v5
-; CHECK: .section .bss,"wb",associative,_f6
+; CHECK: .section .bss,"bw",associative,_f6
; CHECK: .globl _v6
-; CHECK: .section .bss,"wb",same_size,_f6
+; CHECK: .section .bss,"bw",same_size,_f6
; CHECK: .globl _f6
-; CHECK: .section .rdata,"rd",largest,_vftable
+; CHECK: .section .rdata,"dr",largest,_vftable
; CHECK: .globl _vftable
; CHECK: _vftable = L_some_name+4
diff --git a/llvm/test/CodeGen/X86/dllexport-x86_64.ll b/llvm/test/CodeGen/X86/dllexport-x86_64.ll
index 25b88e5..629a557 100644
--- a/llvm/test/CodeGen/X86/dllexport-x86_64.ll
+++ b/llvm/test/CodeGen/X86/dllexport-x86_64.ll
@@ -37,7 +37,7 @@
; CHECK: .globl Var1
@Var1 = dllexport global i32 1, align 4
-; CHECK: .rdata,"rd"
+; CHECK: .rdata,"dr"
; CHECK: .globl Var2
@Var2 = dllexport unnamed_addr constant i32 1
diff --git a/llvm/test/CodeGen/X86/dllexport.ll b/llvm/test/CodeGen/X86/dllexport.ll
index 91e1074..02a83ae 100644
--- a/llvm/test/CodeGen/X86/dllexport.ll
+++ b/llvm/test/CodeGen/X86/dllexport.ll
@@ -58,7 +58,7 @@
; CHECK: .globl _Var1
@Var1 = dllexport global i32 1, align 4
-; CHECK: .rdata,"rd"
+; CHECK: .rdata,"dr"
; CHECK: .globl _Var2
@Var2 = dllexport unnamed_addr constant i32 1
diff --git a/llvm/test/CodeGen/X86/global-sections.ll b/llvm/test/CodeGen/X86/global-sections.ll
index 29bf9963b..0502582 100644
--- a/llvm/test/CodeGen/X86/global-sections.ll
+++ b/llvm/test/CodeGen/X86/global-sections.ll
@@ -48,7 +48,7 @@
; LINUX-SECTIONS: .section .rodata.G3,"a",@progbits
; LINUX-SECTIONS: .globl G3
-; WIN32-SECTIONS: .section .rdata,"rd",one_only,_G3
+; WIN32-SECTIONS: .section .rdata,"dr",one_only,_G3
; WIN32-SECTIONS: .globl _G3
@@ -124,7 +124,7 @@
; LINUX-SECTIONS: .section .rodata.str1.1,"aMS",@progbits,1
; LINUX-SECTIONS: .globl G7
-; WIN32-SECTIONS: .section .rdata,"rd",one_only,_G7
+; WIN32-SECTIONS: .section .rdata,"dr",one_only,_G7
; WIN32-SECTIONS: .globl _G7
@@ -187,7 +187,7 @@
; LINUX-SECTIONS: .asciz "foo"
; LINUX-SECTIONS: .size .LG14, 4
-; WIN32-SECTIONS: .section .rdata,"rd"
+; WIN32-SECTIONS: .section .rdata,"dr"
; WIN32-SECTIONS: L_G14:
; WIN32-SECTIONS: .asciz "foo"
@@ -209,5 +209,5 @@
; LINUX-SECTIONS: .section .rodata.cst8,"aM",@progbits,8
; LINUX-SECTIONS: G15:
-; WIN32-SECTIONS: .section .rdata,"rd",one_only,_G15
+; WIN32-SECTIONS: .section .rdata,"dr",one_only,_G15
; WIN32-SECTIONS: _G15:
diff --git a/llvm/test/CodeGen/X86/win_cst_pool.ll b/llvm/test/CodeGen/X86/win_cst_pool.ll
index e8b853a..d534b12 100644
--- a/llvm/test/CodeGen/X86/win_cst_pool.ll
+++ b/llvm/test/CodeGen/X86/win_cst_pool.ll
@@ -6,7 +6,7 @@
ret double 0x0000000000800000
}
; CHECK: .globl __real@0000000000800000
-; CHECK-NEXT: .section .rdata,"rd",discard,__real@0000000000800000
+; CHECK-NEXT: .section .rdata,"dr",discard,__real@0000000000800000
; CHECK-NEXT: .align 8
; CHECK-NEXT: __real@0000000000800000:
; CHECK-NEXT: .quad 8388608
@@ -18,7 +18,7 @@
ret <4 x i32> <i32 3, i32 2, i32 1, i32 0>
}
; CHECK: .globl __xmm@00000000000000010000000200000003
-; CHECK-NEXT: .section .rdata,"rd",discard,__xmm@00000000000000010000000200000003
+; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000000000000010000000200000003
; CHECK-NEXT: .align 16
; CHECK-NEXT: __xmm@00000000000000010000000200000003:
; CHECK-NEXT: .long 3
@@ -33,7 +33,7 @@
ret <8 x i16> <i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>
}
; CHECK: .globl __xmm@00000001000200030004000500060007
-; CHECK-NEXT: .section .rdata,"rd",discard,__xmm@00000001000200030004000500060007
+; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000001000200030004000500060007
; CHECK-NEXT: .align 16
; CHECK-NEXT: __xmm@00000001000200030004000500060007:
; CHECK-NEXT: .short 7
@@ -53,7 +53,7 @@
ret <4 x float> <float 1.0, float 1.0, float undef, float undef>
; CHECK: .globl __xmm@00000000000000003f8000003f800000
-; CHECK-NEXT: .section .rdata,"rd",discard,__xmm@00000000000000003f8000003f800000
+; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000000000000003f8000003f800000
; CHECK-NEXT: .align 16
; CHECK-NEXT: __xmm@00000000000000003f8000003f800000:
; CHECK-NEXT: .long 1065353216 # float 1