commit 563f0417d272ff5505ec06d88876d22ee4c6a88f
author Chris Lattner <sabre@nondot.org> Mon May 01 05:53:50 2006 +0000
committer Chris Lattner <sabre@nondot.org> Mon May 01 05:53:50 2006 +0000
tree 042a3dcf68838003963b0a8937ccc610c698aed6
parent 25f55ae74a970ea876c814c5e75a516c271742d6

Remove %'s from register names when in intel mode.

llvm-svn: 28027

llvm/lib/Target/X86/X86IntelAsmPrinter.cpp

diff --git a/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp b/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
index 11fb260..e217eef 100755
--- a/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -102,10 +102,9 @@
     // FALLTHROUGH
   case MachineOperand::MO_MachineRegister:
     if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
-      // Bug Workaround: See note in Printer::doInitialization about %.
-      O << "%" << RI.get(MO.getReg()).Name;
+      O << RI.get(MO.getReg()).Name;
     else
-      O << "%reg" << MO.getReg();
+      O << "reg" << MO.getReg();
     return;
 
   case MachineOperand::MO_SignExtendedImmed:
@@ -355,7 +354,7 @@
     break;
   }
 
-  O << '%' << Name;
+  O << Name;
   return false;
 }
 

llvm/lib/Target/X86/X86IntelAsmPrinter.h

diff --git a/llvm/lib/Target/X86/X86IntelAsmPrinter.h b/llvm/lib/Target/X86/X86IntelAsmPrinter.h
index fae8b8a..ffa3990 100755
--- a/llvm/lib/Target/X86/X86IntelAsmPrinter.h
+++ b/llvm/lib/Target/X86/X86IntelAsmPrinter.h
@@ -40,8 +40,7 @@
     const MachineOperand &MO = MI->getOperand(OpNo);
     if (MO.getType() == MachineOperand::MO_MachineRegister) {
       assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
-      // Bug Workaround: See note in Printer::doInitialization about %.
-      O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name;
+      O << TM.getRegisterInfo()->get(MO.getReg()).Name;
     } else {
       printOp(MO, Modifier);
     }