[CodeGen] Use more getMFIfAvailable
llvm-svn: 320046
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index f5857db..85b441c 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -339,13 +339,9 @@
static void tryToGetTargetInfo(const MachineOperand &MO,
const TargetRegisterInfo *&TRI,
const TargetIntrinsicInfo *&IntrinsicInfo) {
- if (const MachineInstr *MI = MO.getParent()) {
- if (const MachineBasicBlock *MBB = MI->getParent()) {
- if (const MachineFunction *MF = MBB->getParent()) {
- TRI = MF->getSubtarget().getRegisterInfo();
- IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
- }
- }
+ if (const MachineFunction *MF = getMFIfAvailable(MO)) {
+ TRI = MF->getSubtarget().getRegisterInfo();
+ IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
}
}
@@ -394,15 +390,11 @@
}
// Print the register class / bank.
if (TargetRegisterInfo::isVirtualRegister(Reg)) {
- if (const MachineInstr *MI = getParent()) {
- if (const MachineBasicBlock *MBB = MI->getParent()) {
- if (const MachineFunction *MF = MBB->getParent()) {
- const MachineRegisterInfo &MRI = MF->getRegInfo();
- if (!PrintDef || MRI.def_empty(Reg)) {
- OS << ':';
- OS << printRegClassOrBank(Reg, MRI, TRI);
- }
- }
+ if (const MachineFunction *MF = getMFIfAvailable(*this)) {
+ const MachineRegisterInfo &MRI = MF->getRegInfo();
+ if (!PrintDef || MRI.def_empty(Reg)) {
+ OS << ':';
+ OS << printRegClassOrBank(Reg, MRI, TRI);
}
}
}