Fix "the the" in comments.

llvm-svn: 240112
diff --git a/llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll b/llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
index f0b8299..c9f668f 100644
--- a/llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
@@ -24,7 +24,7 @@
 }
 
 ; Check that we manage to form a zextload is an operation with only one
-; argument to explicitly extend is in the the way.
+; argument to explicitly extend is in the way.
 ; OPTALL-LABEL: @promoteOneArg
 ; OPTALL: [[LD:%[a-zA-Z_0-9-]+]] = load i8, i8* %p
 ; OPT-NEXT: [[ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i32
@@ -49,7 +49,7 @@
 }
 
 ; Check that we manage to form a sextload is an operation with only one
-; argument to explicitly extend is in the the way.
+; argument to explicitly extend is in the way.
 ; Version with sext.
 ; OPTALL-LABEL: @promoteOneArgSExt
 ; OPTALL: [[LD:%[a-zA-Z_0-9-]+]] = load i8, i8* %p
@@ -74,7 +74,7 @@
 }
 
 ; Check that we manage to form a zextload is an operation with two
-; arguments to explicitly extend is in the the way.
+; arguments to explicitly extend is in the way.
 ; Extending %add will create two extensions:
 ; 1. One for %b.
 ; 2. One for %t.
@@ -113,7 +113,7 @@
 }
 
 ; Check that we manage to form a sextload is an operation with two
-; arguments to explicitly extend is in the the way.
+; arguments to explicitly extend is in the way.
 ; Version with sext.
 ; OPTALL-LABEL: @promoteTwoArgSExt
 ; OPTALL: [[LD:%[a-zA-Z_0-9-]+]] = load i8, i8* %p
diff --git a/llvm/test/CodeGen/AMDGPU/local-memory-two-objects.ll b/llvm/test/CodeGen/AMDGPU/local-memory-two-objects.ll
index 06a8b12..f501a7a 100644
--- a/llvm/test/CodeGen/AMDGPU/local-memory-two-objects.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-memory-two-objects.ll
@@ -14,7 +14,7 @@
 
 ; EG: {{^}}local_memory_two_objects:
 
-; We would like to check the the lds writes are using different
+; We would like to check the lds writes are using different
 ; addresses, but due to variations in the scheduler, we can't do
 ; this consistently on evergreen GPUs.
 ; EG: LDS_WRITE
diff --git a/llvm/test/CodeGen/ARM/debug-frame-vararg.ll b/llvm/test/CodeGen/ARM/debug-frame-vararg.ll
index 19e55fe..c1eff0a 100644
--- a/llvm/test/CodeGen/ARM/debug-frame-vararg.ll
+++ b/llvm/test/CodeGen/ARM/debug-frame-vararg.ll
@@ -4,7 +4,7 @@
 ; RUN: llc -mtriple thumb-unknown-linux-gnueabi -filetype asm -o - %s -disable-fp-elim | FileCheck %s --check-prefix=CHECK-THUMB-FP-ELIM
 
 ; Tests that the initial space allocated to the varargs on the stack is
-; taken into account in the the .cfi_ directives.
+; taken into account in the .cfi_ directives.
 
 ; Generated from the C program:
 ; #include <stdarg.h>
diff --git a/llvm/test/CodeGen/Mips/cconv/callee-saved.ll b/llvm/test/CodeGen/Mips/cconv/callee-saved.ll
index d0b1e64..0570ab3 100644
--- a/llvm/test/CodeGen/Mips/cconv/callee-saved.ll
+++ b/llvm/test/CodeGen/Mips/cconv/callee-saved.ll
@@ -18,7 +18,7 @@
 ; RUN: llc -march=mips64 -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=N64-INV %s
 ; RUN: llc -march=mips64el -target-abi n64 < %s | FileCheck --check-prefix=ALL --check-prefix=N64-INV %s
 
-; Test the the callee-saved registers are callee-saved as specified by section
+; Test the callee-saved registers are callee-saved as specified by section
 ; 2 of the MIPSpro N32 Handbook and section 3 of the SYSV ABI spec.
 
 define void @gpr_clobber() nounwind {
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-extload.ll b/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
index 65502b3..c5c761e 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
@@ -30,7 +30,7 @@
 }
 
 ; Check that we manage to form a zextload is an operation with only one
-; argument to explicitly extend is in the the way.
+; argument to explicitly extend is in the way.
 ; OPTALL-LABEL: @promoteOneArg
 ; OPTALL: [[LD:%[a-zA-Z_0-9-]+]] = load i8, i8* %p
 ; OPT-NEXT: [[ZEXT:%[a-zA-Z_0-9-]+]] = zext i8 [[LD]] to i32
@@ -55,7 +55,7 @@
 }
 
 ; Check that we manage to form a sextload is an operation with only one
-; argument to explicitly extend is in the the way.
+; argument to explicitly extend is in the way.
 ; Version with sext.
 ; OPTALL-LABEL: @promoteOneArgSExt
 ; OPTALL: [[LD:%[a-zA-Z_0-9-]+]] = load i8, i8* %p
@@ -80,7 +80,7 @@
 }
 
 ; Check that we manage to form a zextload is an operation with two
-; arguments to explicitly extend is in the the way.
+; arguments to explicitly extend is in the way.
 ; Extending %add will create two extensions:
 ; 1. One for %b.
 ; 2. One for %t.
@@ -119,7 +119,7 @@
 }
 
 ; Check that we manage to form a sextload is an operation with two
-; arguments to explicitly extend is in the the way.
+; arguments to explicitly extend is in the way.
 ; Version with sext.
 ; OPTALL-LABEL: @promoteTwoArgSExt
 ; OPTALL: [[LD:%[a-zA-Z_0-9-]+]] = load i8, i8* %p