commit 57a2eaf3c1aa1a08e9b474b873064e075c52daef
author Rumeet Dhindsa <rdhindsa@google.com> Tue Mar 10 10:59:26 2020 -0700
committer Rumeet Dhindsa <rdhindsa@google.com> Tue Mar 10 10:59:26 2020 -0700
tree 1148ef779729a5cee1a973d70e9ca89fb0fbce3a
parent 66945b62f42f0911a328a354cbc7db40b05b76eb

Revert "[modules] Do not cache invalid state for modules that we attempted to load."
As per comment on https://reviews.llvm.org/D72860, it is suggested to
revert this change in the meantime, since it has introduced regression.

This reverts commit 83f4c3af021cd5322ea10fd1c4e839874c1dae49.

clang/lib/Serialization/ASTWriter.cpp

diff --git a/clang/lib/Serialization/ASTWriter.cpp b/clang/lib/Serialization/ASTWriter.cpp
index bf893c7..1278841 100644
--- a/clang/lib/Serialization/ASTWriter.cpp
+++ b/clang/lib/Serialization/ASTWriter.cpp
@@ -4317,7 +4317,7 @@
   WritingAST = false;
   if (ShouldCacheASTInMemory) {
     // Construct MemoryBuffer and update buffer manager.
-    ModuleCache.addFinalPCM(OutputFile,
+    ModuleCache.addBuiltPCM(OutputFile,
                             llvm::MemoryBuffer::getMemBufferCopy(
                                 StringRef(Buffer.begin(), Buffer.size())));
   }