[mips] Enable tail calls by default

Enable tail calls by default for (micro)MIPS(64).

microMIPS is slightly more tricky than doing it for MIPS(R6) or microMIPSR6.
microMIPS has two instruction encodings: 16bit and 32bit along with some
restrictions on the size of the instruction that can fill the delay slot.
For safe tail calls for microMIPS, the delay slot filler attempts to find
a correct size instruction for the delay slot of TAILCALL pseudos.

Reviewers: dsanders, vkalintris

Subscribers: jfb, dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D21138

llvm-svn: 277708
diff --git a/llvm/test/CodeGen/Mips/tailcall.ll b/llvm/test/CodeGen/Mips/tailcall.ll
index 61f8e50..1db780c 100644
--- a/llvm/test/CodeGen/Mips/tailcall.ll
+++ b/llvm/test/CodeGen/Mips/tailcall.ll
@@ -1,13 +1,32 @@
-; RUN: llc -march=mipsel -relocation-model=pic -enable-mips-tail-calls \
+; RUN: llc -march=mipsel -relocation-model=pic  \
 ; RUN:     -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC32
-; RUN: llc -march=mipsel -relocation-model=static -enable-mips-tail-calls \
+; RUN: llc -march=mipsel -relocation-model=static  \
 ; RUN:     -verify-machineinstrs < %s | FileCheck %s -check-prefix=STATIC32
-; RUN: llc -march=mips64el -mcpu=mips64r2 -enable-mips-tail-calls \
+; RUN: llc -march=mips64el -mcpu=mips64r2  \
 ; RUN:     -verify-machineinstrs < %s | FileCheck %s -check-prefix=N64
 ; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic \
-; RUN:     -enable-mips-tail-calls -verify-machineinstrs < %s | \
+; RUN:      -verify-machineinstrs < %s | \
 ; RUN:     FileCheck %s -check-prefix=PIC16
 
+; RUN: llc -march=mipsel -relocation-model=pic -mattr=+micromips < %s | \
+; RUN:     FileCheck %s -check-prefix=PIC32
+; RUN: llc -march=mipsel -relocation-model=static -mattr=+micromips \
+; RUN:     < %s | FileCheck %s -check-prefix=STATIC32
+
+; RUN: llc -march=mipsel -relocation-model=pic -mcpu=mips32r6 < %s | \
+; RUN:     FileCheck %s -check-prefix=PIC32
+; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r6 \
+; RUN:     < %s | FileCheck %s -check-prefix=STATIC32
+; RUN: llc -march=mips64el -mcpu=mips64r6  \
+; RUN:     < %s | FileCheck %s -check-prefix=N64
+
+; RUN: llc -march=mipsel -relocation-model=pic -mcpu=mips32r6 -mattr=+micromips \
+; RUN:      < %s | FileCheck %s -check-prefix=PIC32
+; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r6 \
+; RUN:     -mattr=+micromips < %s | FileCheck %s -check-prefix=STATIC32
+; RUN: llc -march=mips64el -mcpu=mips64r6 -mattr=+micromips < %s \
+; RUN:      | FileCheck %s -check-prefix=N64
+
 @g0 = common global i32 0, align 4
 @g1 = common global i32 0, align 4
 @g2 = common global i32 0, align 4
@@ -74,13 +93,13 @@
 define i32 @caller5() nounwind readonly {
 entry:
 ; PIC32: .ent caller5
-; PIC32-NOT: jalr
+; PIC32-NOT: jalr $25
 ; PIC32: .end caller5
 ; STATIC32: .ent caller5
 ; STATIC32-NOT: jal
 ; STATIC32: .end caller5
 ; N64: .ent caller5
-; N64-NOT: jalr
+; N64-NOT: jalr $25
 ; N64: .end caller5
 ; PIC16: .ent caller5
 ; PIC16: jalrc
@@ -118,6 +137,19 @@
 
 define i32 @caller8_0() nounwind {
 entry:
+; PIC32: .ent caller8_0
+; PIC32: jr
+; PIC32: .end caller8_0
+; STATIC32: .ent caller8_0
+; STATIC32: j
+; STATIC32: .end caller8_0
+; N64: .ent caller8_0
+; N64-NOT: jalr $25
+; N64: .end caller8_0
+; PIC16: .ent caller8_0
+; PIC16: jalrc
+; PIC16: .end caller8_0
+
   %call = tail call fastcc i32 @caller8_1()
   ret i32 %call
 }
@@ -131,7 +163,7 @@
 ; STATIC32: jal
 ; STATIC32: .end caller8_1
 ; N64: .ent caller8_1
-; N64-NOT: jalr
+; N64-NOT: jalr $25
 ; N64: .end caller8_1
 ; PIC16: .ent caller8_1
 ; PIC16: jalrc
@@ -149,6 +181,18 @@
 
 define i32 @caller9_0() nounwind {
 entry:
+; PIC32: .ent caller9_0
+; PIC32: jr
+; PIC32: .end caller9_0
+; STATIC32: .ent caller9_0
+; STATIC32: j
+; STATIC32: .end caller9_0
+; N64: .ent caller9_0
+; N64-NOT: jalr $25
+; N64: .end caller9_0
+; PIC16: .ent caller9_0
+; PIC16: jalrc
+; PIC16: .end caller9_0
   %call = tail call fastcc i32 @caller9_1()
   ret i32 %call
 }
@@ -177,11 +221,11 @@
 define i32 @caller10(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) nounwind {
 entry:
 ; PIC32: .ent caller10
-; PIC32-NOT: jalr
+; PIC32-NOT: jalr $25
 ; STATIC32: .ent caller10
 ; STATIC32-NOT: jal
 ; N64: .ent caller10
-; N64-NOT: jalr
+; N64-NOT: jalr $25
 ; PIC16: .ent caller10
 ; PIC16: jalrc
 
@@ -236,7 +280,7 @@
 ; STATIC32: .ent caller13
 ; STATIC32-NOT: jal
 ; N64: .ent caller13
-; N64-NOT: jalr
+; N64-NOT: jalr $25
 ; PIC16: .ent caller13
 ; PIC16: jalrc