Add C intrinsics for Intel SHA Extensions
Intrinsics added shaintrin.h, which is included from x86intrin.h if __SHA__ is
enabled. SHA implies SSE2, which is needed for the __m128i type.
Also add the -msha/-mno-sha option.
llvm-svn: 190999
diff --git a/clang/test/CodeGen/builtins-x86.c b/clang/test/CodeGen/builtins-x86.c
index fcf1512..9e78235 100644
--- a/clang/test/CodeGen/builtins-x86.c
+++ b/clang/test/CodeGen/builtins-x86.c
@@ -491,5 +491,13 @@
tmp_V2f = __builtin_ia32_pi2fw(tmp_V2i);
tmp_V2f = __builtin_ia32_pswapdsf(tmp_V2f);
tmp_V2i = __builtin_ia32_pswapdsi(tmp_V2i);
+
+ tmp_V4i = __builtin_ia32_sha1rnds4(tmp_V4i, tmp_V4i, imm_i);
+ tmp_V4i = __builtin_ia32_sha1nexte(tmp_V4i, tmp_V4i);
+ tmp_V4i = __builtin_ia32_sha1msg1(tmp_V4i, tmp_V4i);
+ tmp_V4i = __builtin_ia32_sha1msg2(tmp_V4i, tmp_V4i);
+ tmp_V4i = __builtin_ia32_sha256rnds2(tmp_V4i, tmp_V4i, tmp_V4i);
+ tmp_V4i = __builtin_ia32_sha256msg1(tmp_V4i, tmp_V4i);
+ tmp_V4i = __builtin_ia32_sha256msg2(tmp_V4i, tmp_V4i);
#endif
}
diff --git a/clang/test/CodeGen/sha-builtins.c b/clang/test/CodeGen/sha-builtins.c
new file mode 100644
index 0000000..ba1a480
--- /dev/null
+++ b/clang/test/CodeGen/sha-builtins.c
@@ -0,0 +1,35 @@
+// RUN: %clang_cc1 %s -O3 -triple=x86_64-unknown-unknown -target-feature +sha -emit-llvm -o - | FileCheck %s
+
+// Don't include mm_malloc.h, it's system specific.
+#define __MM_MALLOC_H
+
+#include <x86intrin.h>
+
+__m128i test_sha1rnds4(__m128i a, __m128i b) {
+ // CHECK: call <4 x i32> @llvm.x86.sha1rnds4
+ return _mm_sha1rnds4_epu32(a, b, 8);
+}
+__m128i test_sha1nexte(__m128i a, __m128i b) {
+ // CHECK: call <4 x i32> @llvm.x86.sha1nexte
+ return _mm_sha1nexte_epu32(a, b);
+}
+__m128i test_sha1msg1(__m128i a, __m128i b) {
+ // CHECK: call <4 x i32> @llvm.x86.sha1msg1
+ return _mm_sha1msg1_epu32(a, b);
+}
+__m128i test_sha1msg2(__m128i a, __m128i b) {
+ // CHECK: call <4 x i32> @llvm.x86.sha1msg2
+ return _mm_sha1msg2_epu32(a, b);
+}
+__m128i test_sha256rnds2(__m128i a, __m128i b, __m128i c) {
+ // CHECK: call <4 x i32> @llvm.x86.sha256rnds2
+ return _mm_sha256rnds2_epu32(a, b, c);
+}
+__m128i test_sha256msg1(__m128i a, __m128i b) {
+ // CHECK: call <4 x i32> @llvm.x86.sha256msg1
+ return _mm_sha256msg1_epu32(a, b);
+}
+__m128i test_sha256msg2(__m128i a, __m128i b) {
+ // CHECK: call <4 x i32> @llvm.x86.sha256msg2
+ return _mm_sha256msg2_epu32(a, b);
+}
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