commit 596c56ff9c744b227d189ab04ac90c47f77dfa68
author Clement Courbet <courbet@google.com> Wed Sep 26 11:22:56 2018 +0000
committer Clement Courbet <courbet@google.com> Wed Sep 26 11:22:56 2018 +0000
tree d65447af9bf8f167c4f8bcd880bb4614e2e9076f
parent 5beaac433dac39034fa85ca6fa785e86d3260ffa

[llvm-exegesis] Add support for measuring NumMicroOps.

Summary:
Example output for vzeroall:

---
mode:            uops
key:
  instructions:
    - 'VZEROALL'
  config:          ''
  register_initial_values:
cpu_name:        haswell
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 10000
measurements:
  - { debug_string: HWPort0, value: 0.0006, per_snippet_value: 0.0006,
      key: '3' }
  - { debug_string: HWPort1, value: 0.0011, per_snippet_value: 0.0011,
      key: '4' }
  - { debug_string: HWPort2, value: 0.0004, per_snippet_value: 0.0004,
      key: '5' }
  - { debug_string: HWPort3, value: 0.0018, per_snippet_value: 0.0018,
      key: '6' }
  - { debug_string: HWPort4, value: 0.0002, per_snippet_value: 0.0002,
      key: '7' }
  - { debug_string: HWPort5, value: 1.0019, per_snippet_value: 1.0019,
      key: '8' }
  - { debug_string: HWPort6, value: 1.0033, per_snippet_value: 1.0033,
      key: '9' }
  - { debug_string: HWPort7, value: 0.0001, per_snippet_value: 0.0001,
      key: '10' }
  - { debug_string: NumMicroOps, value: 20.0069, per_snippet_value: 20.0069,
      key: NumMicroOps }
error:           ''
info:            ''
assembled_snippet: C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C5FC77C3
...

Reviewers: gchatelet

Subscribers: tschuett, RKSimon, andreadb, llvm-commits

Differential Revision: https://reviews.llvm.org/D52539

llvm-svn: 343094

llvm/utils/TableGen/CodeGenSchedule.cpp

diff --git a/llvm/utils/TableGen/CodeGenSchedule.cpp b/llvm/utils/TableGen/CodeGenSchedule.cpp
index 545e829..625944b 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.cpp
+++ b/llvm/utils/TableGen/CodeGenSchedule.cpp
@@ -1787,6 +1787,15 @@
     }
     PM.PfmCycleCounterDef = Def;
   }
+  for (Record *Def : Records.getAllDerivedDefinitions("PfmUopsCounter")) {
+    CodeGenProcModel &PM = getProcModel(Def->getValueAsDef("SchedModel"));
+    if (PM.PfmUopsCounterDef) {
+      PrintFatalError(Def->getLoc(),
+                      "multiple uops counters for " +
+                          Def->getValueAsDef("SchedModel")->getName());
+    }
+    PM.PfmUopsCounterDef = Def;
+  }
 }
 
 // Collect and sort WriteRes, ReadAdvance, and ProcResources.

llvm/utils/TableGen/CodeGenSchedule.h

diff --git a/llvm/utils/TableGen/CodeGenSchedule.h b/llvm/utils/TableGen/CodeGenSchedule.h
index 3ed753c..c2af28b 100644
--- a/llvm/utils/TableGen/CodeGenSchedule.h
+++ b/llvm/utils/TableGen/CodeGenSchedule.h
@@ -242,6 +242,7 @@
   // List of PfmCounters.
   RecVec PfmIssueCounterDefs;
   Record *PfmCycleCounterDef = nullptr;
+  Record *PfmUopsCounterDef = nullptr;
 
   CodeGenProcModel(unsigned Idx, std::string Name, Record *MDef,
                    Record *IDef) :
@@ -259,7 +260,8 @@
   bool hasExtraProcessorInfo() const {
     return RetireControlUnit || !RegisterFiles.empty() ||
         !PfmIssueCounterDefs.empty() ||
-        PfmCycleCounterDef != nullptr;
+        PfmCycleCounterDef != nullptr ||
+        PfmUopsCounterDef != nullptr;
   }
 
   unsigned getProcResourceIdx(Record *PRDef) const;

llvm/utils/TableGen/SubtargetEmitter.cpp

diff --git a/llvm/utils/TableGen/SubtargetEmitter.cpp b/llvm/utils/TableGen/SubtargetEmitter.cpp
index 33257b6..100399f 100644
--- a/llvm/utils/TableGen/SubtargetEmitter.cpp
+++ b/llvm/utils/TableGen/SubtargetEmitter.cpp
@@ -743,6 +743,13 @@
   else
     OS << "    nullptr,  // No cycle counter.\n";
 
+  // Emit the uops counter.
+  if (ProcModel.PfmUopsCounterDef)
+    OS << "    \"" << ProcModel.PfmUopsCounterDef->getValueAsString("Counter")
+       << "\",  // Uops counter.\n";
+  else
+    OS << "    nullptr,  // No uops counter.\n";
+
   // Emit a reference to issue counters table.
   if (HasPfmIssueCounters)
     OS << "    " << ProcModel.ModelName << "PfmIssueCounters\n";