commit 5996da203214fce8ae313bc0a86a1413de2749c5
author Craig Topper <craig.topper@gmail.com> Sat Sep 27 04:38:02 2014 +0000
committer Craig Topper <craig.topper@gmail.com> Sat Sep 27 04:38:02 2014 +0000
tree f77c4f0eea1c52a5a98f0c8dc850137944442941
parent ef5dbf55c83c4921576bc9946ad949ad5844a476

Fix TableGen -gen-disassembler output for bit fields with an offset.

This fixes bit assignments like this
Inst{7-0} = Foo{9-2}

Patch by Steve King.

llvm-svn: 218560

llvm/utils/TableGen/FixedLenDecoderEmitter.cpp

diff --git a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
index 084bef2..810bd11 100644
--- a/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
+++ b/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
@@ -1051,7 +1051,11 @@
     OperandInfo::const_iterator OI = OpInfo.begin();
     o.indent(Indentation) << "tmp = fieldFromInstruction"
                           << "(insn, " << OI->Base << ", " << OI->Width
-                          << ");\n";
+                          << ")";
+    if (OI->Offset)
+      o << " << " << OI->Offset;
+    o << ";\n";
+
   } else {
     o.indent(Indentation) << "tmp = 0;\n";
     for (OperandInfo::const_iterator OI = OpInfo.begin(), OE = OpInfo.end();