Improve Register Setup

llvm-svn: 342464
diff --git a/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp b/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
index 0c2f3fb..b8533fb 100644
--- a/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
+++ b/llvm/unittests/tools/llvm-exegesis/X86/TargetTest.cpp
@@ -9,16 +9,47 @@
 #include "gmock/gmock.h"
 #include "gtest/gtest.h"
 
+#include "llvm/MC/MCInstPrinter.h"
+
+namespace llvm {
+
+bool operator==(const llvm::MCOperand &a, const llvm::MCOperand &b) {
+  if (a.isImm() && b.isImm())
+    return a.getImm() == b.getImm();
+  if (a.isReg() && b.isReg())
+    return a.getReg() == b.getReg();
+  return false;
+}
+
+bool operator==(const llvm::MCInst &a, const llvm::MCInst &b) {
+  if (a.getOpcode() != b.getOpcode())
+    return false;
+  if (a.getNumOperands() != b.getNumOperands())
+    return false;
+  for (unsigned I = 0; I < a.getNumOperands(); ++I) {
+    if (!(a.getOperand(I) == b.getOperand(I)))
+      return false;
+  }
+  return true;
+}
+
+} // namespace llvm
+
 namespace exegesis {
 
 void InitializeX86ExegesisTarget();
 
 namespace {
 
+using testing::ElementsAre;
 using testing::Gt;
 using testing::NotNull;
 using testing::SizeIs;
 
+using llvm::APInt;
+using llvm::MCInst;
+using llvm::MCInstBuilder;
+
 constexpr const char kTriple[] = "x86_64-unknown-linux";
 
 class X86TargetTest : public ::testing::Test {
@@ -166,5 +197,45 @@
   EXPECT_EQ(Insts[18].getOpcode(), llvm::X86::ADD64ri8);
 }
 
+TEST_F(X86TargetTest, SetToAPInt) {
+  const std::unique_ptr<llvm::MCSubtargetInfo> STI(
+      Target_->createMCSubtargetInfo(kTriple, "core2", ""));
+  // EXPECT_THAT(ExegesisTarget_->setRegTo(*STI, APInt(8, 0xFFU),
+  // llvm::X86::AL),
+  //             ElementsAre((MCInst)MCInstBuilder(llvm::X86::MOV8ri)
+  //                             .addReg(llvm::X86::AL)
+  //                             .addImm(0xFFU)));
+  // EXPECT_THAT(
+  //     ExegesisTarget_->setRegTo(*STI, APInt(16, 0xFFFFU), llvm::X86::BX),
+  //     ElementsAre((MCInst)MCInstBuilder(llvm::X86::MOV16ri)
+  //                     .addReg(llvm::X86::BX)
+  //                     .addImm(0xFFFFU)));
+  // EXPECT_THAT(
+  //     ExegesisTarget_->setRegTo(*STI, APInt(32, 0x7FFFFU), llvm::X86::ECX),
+  //     ElementsAre((MCInst)MCInstBuilder(llvm::X86::MOV32ri)
+  //                     .addReg(llvm::X86::ECX)
+  //                     .addImm(0x7FFFFU)));
+  // EXPECT_THAT(ExegesisTarget_->setRegTo(*STI, APInt(64,
+  // 0x7FFFFFFFFFFFFFFFULL),
+  //                                       llvm::X86::RDX),
+  //             ElementsAre((MCInst)MCInstBuilder(llvm::X86::MOV64ri)
+  //                             .addReg(llvm::X86::RDX)
+  //                             .addImm(0x7FFFFFFFFFFFFFFFULL)));
+
+  const std::unique_ptr<llvm::MCRegisterInfo> MRI(
+      Target_->createMCRegInfo(kTriple));
+  const std::unique_ptr<llvm::MCAsmInfo> MAI(
+      Target_->createMCAsmInfo(*MRI, kTriple));
+  const std::unique_ptr<llvm::MCInstrInfo> MII(Target_->createMCInstrInfo());
+  const std::unique_ptr<llvm::MCInstPrinter> MIP(
+      Target_->createMCInstPrinter(llvm::Triple(kTriple), 1, *MAI, *MII, *MRI));
+
+  for (const auto M : ExegesisTarget_->setRegTo(
+           *STI, APInt(80, "ABCD1234123456785678", 16), llvm::X86::MM0)) {
+    MIP->printInst(&M, llvm::errs(), "", *STI);
+    llvm::errs() << "\n";
+  }
+}
+
 } // namespace
 } // namespace exegesis