Revert "[mips] N64 static relocation model support"
This reverts commit r293164. There are multiple tests failing.
llvm-svn: 293170
diff --git a/llvm/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll b/llvm/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll
index d3cc03f..c0229c6 100644
--- a/llvm/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll
+++ b/llvm/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll
@@ -17,7 +17,7 @@
; STATIC-N32: lwc1 $f0, %lo(.LCPI0_0)($[[R0]])
; PIC-N64: ld $[[R0:[0-9]+]], %got_page(.LCPI0_0)
; PIC-N64: lwc1 $f0, %got_ofst(.LCPI0_0)($[[R0]])
-; STATIC-N64: lui $[[R0:[0-9]+]], %highest(.LCPI0_0)
-; STATIC-N64: lwc1 $f0, %lo(.LCPI0_0)($[[R0]])
+; STATIC-N64: ld $[[R0:[0-9]+]], %got_page(.LCPI0_0)
+; STATIC-N64: lwc1 $f0, %got_ofst(.LCPI0_0)($[[R0]])
ret float 0x400B333340000000
}
diff --git a/llvm/test/CodeGen/Mips/2010-07-20-Switch.ll b/llvm/test/CodeGen/Mips/2010-07-20-Switch.ll
index 087a34f..5f0a0a5 100644
--- a/llvm/test/CodeGen/Mips/2010-07-20-Switch.ll
+++ b/llvm/test/CodeGen/Mips/2010-07-20-Switch.ll
@@ -3,13 +3,13 @@
; RUN: llc < %s -march=mips -relocation-model=pic | \
; RUN: FileCheck %s -check-prefix=PIC-O32
; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips4 | \
-; RUN: FileCheck %s -check-prefix=PIC-N64
+; RUN: FileCheck %s -check-prefix=N64
; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips4 | \
-; RUN: FileCheck %s -check-prefix=STATIC-N64
+; RUN: FileCheck %s -check-prefix=N64
; RUN: llc < %s -march=mips64 -relocation-model=pic -mcpu=mips64 | \
-; RUN: FileCheck %s -check-prefix=PIC-N64
+; RUN: FileCheck %s -check-prefix=N64
; RUN: llc < %s -march=mips64 -relocation-model=static -mcpu=mips64 | \
-; RUN: FileCheck %s -check-prefix=STATIC-N64
+; RUN: FileCheck %s -check-prefix=N64
define i32 @main() nounwind readnone {
entry:
@@ -20,29 +20,18 @@
; STATIC-O32: lui $[[R1:[0-9]+]], %hi($JTI0_0)
; STATIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]]
; STATIC-O32: lw $[[R3:[0-9]+]], %lo($JTI0_0)($[[R2]])
-
; PIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2
; PIC-O32: lw $[[R1:[0-9]+]], %got($JTI0_0)
; PIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]]
; PIC-O32: lw $[[R4:[0-9]+]], %lo($JTI0_0)($[[R2]])
; PIC-O32: addu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
; PIC-O32: jr $[[R5]]
-
-; STATIC-N64: mflo $[[R0:[0-9]]]
-; STATIC-N64: lui $[[R1:[0-9]]], %highest(.LJTI0_0)
-; STATIC-N64: daddiu $[[R2:[0-9]]], $[[R1]], %higher(.LJTI0_0)
-; STATIC-N64: dsll $[[R3:[0-9]]], $[[R2]], 16
-; STATIC-N64: daddiu $[[R4:[0-9]]], $[[R3]], %hi(.LJTI0_0)
-; STATIC-N64: dsll $[[R5:[0-9]]], $[[R4]], 16
-; STATIC-N64: daddu $[[R6:[0-9]]], $[[R0]], $[[R4]]
-; STATIC-N64: ld ${{[0-9]+}}, %lo(.LJTI0_0)($[[R6]])
-
-; PIC-N64: dsll $[[R0:[0-9]+]], ${{[0-9]+}}, 32
-; PIC-N64: ld $[[R1:[0-9]+]], %got_page(.LJTI0_0)
-; PIC-N64: daddu $[[R2:[0-9]+]], $[[R0:[0-9]+]], $[[R1]]
-; PIC-N64: ld $[[R4:[0-9]+]], %got_ofst(.LJTI0_0)($[[R2]])
-; PIC-N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
-; PIC-N64: jr $[[R5]]
+; N64: dsll $[[R0:[0-9]+]], ${{[0-9]+}}, 3
+; N64: ld $[[R1:[0-9]+]], %got_page(.LJTI0_0)
+; N64: daddu $[[R2:[0-9]+]], $[[R0:[0-9]+]], $[[R1]]
+; N64: ld $[[R4:[0-9]+]], %got_ofst(.LJTI0_0)($[[R2]])
+; N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
+; N64: jr $[[R5]]
switch i32 %0, label %bb4 [
i32 0, label %bb5
i32 1, label %bb1
@@ -76,18 +65,12 @@
; PIC-O32: $JTI0_0:
; PIC-O32: .gpword
; PIC-O32: .gpword
-; PIC-O32: .gpword
-; PIC-O32: .gpword
-; STATIC-N64: .p2align 3
-; STATIC-N64: LJTI0_0:
-; STATIC-N64: .8byte
-; STATIC-N64: .8byte
-; STATIC-N64: .8byte
-; STATIC-N64: .8byte
-;; PIC-N64: .p2align 3
-; PIC-N64: .LJTI0_0:
-; PIC-N64: .gpdword
-; PIC-N64: .gpdword
-; PIC-N64: .gpdword
-; PIC-N64: .gpdword
+; PIC-O32: .gpword
+; PIC-O32: .gpword
+; N64: .p2align 3
+; N64: .LJTI0_0:
+; N64: .gpdword
+; N64: .gpdword
+; N64: .gpdword
+; N64: .gpdword
diff --git a/llvm/test/CodeGen/Mips/abicalls.ll b/llvm/test/CodeGen/Mips/abicalls.ll
index 2de5397..26bbab4 100644
--- a/llvm/test/CodeGen/Mips/abicalls.ll
+++ b/llvm/test/CodeGen/Mips/abicalls.ll
@@ -1,12 +1,7 @@
; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefixes=ABICALLS,STATIC %s
; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=pic %s -o - | FileCheck -check-prefixes=ABICALLS,PIC %s
-; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips4 -relocation-model=static %s -o - | FileCheck -check-prefixes=N64-STATIC %s
-; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck -check-prefixes=N64-STATIC %s
-; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips4 -relocation-model=static -mattr=+sym32 %s -o - | FileCheck -check-prefixes=ABICALLS,STATIC %s
-; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips64 -relocation-model=static -mattr=+sym32 %s -o - | FileCheck -check-prefixes=ABICALLS,STATIC %s
-; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips4 -relocation-model=pic %s -o - | FileCheck -check-prefixes=ABICALLS %s
-; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips64 -relocation-model=pic %s -o - | FileCheck -check-prefixes=ABICALLS %s
-
+; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips4 -relocation-model=static %s -o - | FileCheck -check-prefixes=ABICALLS,PIC %s
+; RUN: llc -filetype=asm -mtriple mips64el-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | FileCheck -check-prefixes=ABICALLS,PIC %s
; RUN: llc -filetype=asm -mtriple mipsel-unknown-linux -mcpu=mips32 -mattr noabicalls -relocation-model=static %s -o - | FileCheck -implicit-check-not='.abicalls' -implicit-check-not='pic0' %s
@@ -14,6 +9,3 @@
; STATIC: pic0
; PIC-NOT: pic0
-
-; N64-STATIC-NOT: .abicalls
-; N64-STATIC-NOT: .pic0
diff --git a/llvm/test/CodeGen/Mips/blockaddr.ll b/llvm/test/CodeGen/Mips/blockaddr.ll
index 80b24bc..9bc9a30 100644
--- a/llvm/test/CodeGen/Mips/blockaddr.ll
+++ b/llvm/test/CodeGen/Mips/blockaddr.ll
@@ -34,14 +34,10 @@
; PIC-N64: daddiu ${{[0-9]+}}, $[[R0]], %got_ofst(.Ltmp[[T0]])
; PIC-N64: ld $[[R1:[0-9]+]], %got_page(.Ltmp[[T1:[0-9]+]])
; PIC-N64: daddiu ${{[0-9]+}}, $[[R1]], %got_ofst(.Ltmp[[T1]])
-
-; STATIC-N64: lui $[[R0:[0-9]]], %highest(.Ltmp[[L0:[0-9]]])
-; STATIC-N64: daddiu $[[R1:[0-9]]], $[[R0]], %higher(.Ltmp[[L0]])
-; STATIC-N64: dsll $[[R2:[0-9]]], $[[R1]], 16
-; STATIC-N64: daddiu $[[R3:[0-9]]], $[[R2]], %hi(.Ltmp[[L0]])
-; STATIC-N64: dsll $[[R4:[0-9]]], $[[R3]], 16
-; STATIC-N64: daddiu $[[R5:[0-9]]], $[[R4]], %lo(.Ltmp[[L0]])
-
+; STATIC-N64: ld $[[R2:[0-9]+]], %got_page(.Ltmp[[T2:[0-9]+]])
+; STATIC-N64: daddiu ${{[0-9]+}}, $[[R2]], %got_ofst(.Ltmp[[T2]])
+; STATIC-N64: ld $[[R3:[0-9]+]], %got_page(.Ltmp[[T3:[0-9]+]])
+; STATIC-N64: daddiu ${{[0-9]+}}, $[[R3]], %got_ofst(.Ltmp[[T3]])
; STATIC-MIPS16-1: .ent f
; STATIC-MIPS16-2: .ent f
; STATIC-MIPS16-1: li $[[R1_16:[0-9]+]], %hi($tmp[[TI_16:[0-9]+]])
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-float.ll b/llvm/test/CodeGen/Mips/cconv/arguments-float.ll
index 7d32992..a76cf62 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-float.ll
@@ -49,7 +49,7 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(doubles)(
; The first four arguments are the same in O32/N32/N64.
; The first argument is floating point but soft-float is enabled so floating
@@ -132,7 +132,7 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(floats)(
; The first four arguments are the same in O32/N32/N64.
; The first argument is floating point but soft-float is enabled so floating
@@ -180,10 +180,10 @@
; ALL-LABEL: double_arg2:
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
-; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG: daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
-; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
+; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(bytes)(
+; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(doubles)(
; The first four arguments are the same in O32/N32/N64.
; The first argument isn't floating point so floating point registers are not
@@ -207,11 +207,10 @@
; ALL-LABEL: float_arg2:
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
-; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG: daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
-; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
-
+; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(bytes)(
+; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(floats)(
; The first four arguments are the same in O32/N32/N64.
; The first argument isn't floating point so floating point registers are not
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-fp128.ll b/llvm/test/CodeGen/Mips/cconv/arguments-fp128.ll
index 086ba9b..70df976 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-fp128.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-fp128.ll
@@ -30,7 +30,7 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(ldoubles)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(ldoubles)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(ldoubles)(
; The first four arguments are the same in N32/N64.
; The first argument is floating point but soft-float is enabled so floating
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll b/llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll
index c59ec02..5f7a865 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-hard-float-varargs.ll
@@ -42,7 +42,7 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG: daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(doubles)(
; O32 forbids using floating point registers for the non-variable portion.
; N32/N64 allow it.
@@ -107,7 +107,7 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG: daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(floats)(
; The first four arguments are the same in O32/N32/N64.
; The non-variable portion should be unaffected.
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll b/llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll
index 24bb95c..2e753d0 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-hard-float.ll
@@ -49,7 +49,7 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(doubles)(
; The first argument is floating point so floating point registers are used.
; The first argument is the same for O32/N32/N64 but the second argument differs
@@ -111,8 +111,8 @@
; ALL-LABEL: float_args:
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
-; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG: daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
+; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
+; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(floats)(
; The first argument is floating point so floating point registers are used.
; The first argument is the same for O32/N32/N64 but the second argument differs
@@ -164,9 +164,9 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG: daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(bytes)(
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(doubles)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(doubles)(
; The first argument is the same in O32/N32/N64.
; ALL-DAG: sb $4, 1([[R1]])
@@ -195,9 +195,9 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG: daddiu [[R1:\$[0-9]]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG: ld [[R1:\$[0-9]]], %got_disp(bytes)(
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(floats)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(floats)(
; The first argument is the same in O32/N32/N64.
; ALL-DAG: sb $4, 1([[R1]])
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll b/llvm/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll
index 6c601e9..1a3b664 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-hard-fp128.ll
@@ -30,7 +30,7 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(ldoubles)
-; SYM64-DAG: daddiu [[R2:\$[0-9]]], ${{[0-9]+}}, %lo(ldoubles)
+; SYM64-DAG: ld [[R2:\$[0-9]]], %got_disp(ldoubles)(
; The first four arguments are the same in N32/N64.
; ALL-DAG: sdc1 $f12, 16([[R2]])
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-struct.ll b/llvm/test/CodeGen/Mips/cconv/arguments-struct.ll
index 6288b5d..44ea7c0 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-struct.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-struct.ll
@@ -28,7 +28,7 @@
; SYM32-DAG: lui [[PTR_HI:\$[0-9]+]], %hi(bytes)
; SYM32-DAG: addiu [[PTR:\$[0-9]+]], [[PTR_HI]], %lo(bytes)
-; SYM64-DAG: addiu [[PTR:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG: ld [[PTR:\$[0-9]+]], %got_disp(bytes)(
; O32-BE-DAG: srl [[ARG:\$[0-9]+]], $4, 24
; O32-BE-DAG: sb [[ARG]], 1([[PTR]])
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll b/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll
index b41b5b7..ba3aeb5 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll
@@ -259,9 +259,7 @@
call void (i8*, ...) @varArgF_SmallStruct(i8* getelementptr inbounds ([3 x i8], [3 x i8]* @.str, i32 0, i32 0), i64 inreg %3)
ret void
; CHECK-LABEL: smallStruct_8b:
- ; Check that the structure is not shifted before the pointer to str is loaded.
; CHECK-NOT: dsll
- ; CHECK: lui
}
define void @smallStruct_9b(%struct.SmallStruct_9b* %ss) #0 {
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll b/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll
index 8a20f5e..74d3d85 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll
@@ -96,7 +96,6 @@
ret void
; CHECK-LABEL: smallStruct_1b1i:
; CHECK-NOT: dsll
- ; CHECK: lui
}
define void @smallStruct_1b1s1b(%struct.SmallStruct_1b1s1b* %ss) #0 {
@@ -130,7 +129,6 @@
ret void
; CHECK-LABEL: smallStruct_1s1i:
; CHECK-NOT: dsll
- ; CHECK: lui
}
define void @smallStruct_3b1s(%struct.SmallStruct_3b1s* %ss) #0 {
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll b/llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
index 785188b..9c20b88 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll
@@ -85,7 +85,7 @@
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(hwords)(
; ALL-DAG: sh [[ARG1]], 2([[GV]])
@@ -203,7 +203,7 @@
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(words)(
; ALL-DAG: sw [[ARG1]], 4([[GV]])
@@ -324,7 +324,7 @@
; O32-DAG: sw [[ARG1]], 12([[GV]])
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(dwords)(
; NEW-DAG: ld [[ARG1:\$[0-9]+]], 0([[VA]])
; NEW-DAG: sd [[ARG1]], 8([[GV]])
@@ -448,7 +448,7 @@
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(hwords)(
; ALL-DAG: sh [[ARG1]], 2([[GV]])
@@ -566,7 +566,7 @@
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(words)(
; ALL-DAG: sw [[ARG1]], 4([[GV]])
@@ -687,7 +687,7 @@
; O32-DAG: sw [[ARG1]], 12([[GV]])
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(dwords)(
; NEW-DAG: ld [[ARG1:\$[0-9]+]], 0([[VA]])
; NEW-DAG: sd [[ARG1]], 8([[GV]])
@@ -810,7 +810,7 @@
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(hwords)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(hwords)(
; ALL-DAG: sh [[ARG1]], 2([[GV]])
@@ -927,7 +927,7 @@
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(words)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(words)(
; ALL-DAG: sw [[ARG1]], 4([[GV]])
@@ -1047,7 +1047,7 @@
; O32-DAG: sw [[ARG1]], 12([[GV]])
; N32-DAG: addiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
-; N64-DAG: daddiu [[GV:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
+; N64-DAG: ld [[GV:\$[0-9]+]], %got_disp(dwords)(
; NEW-DAG: ld [[ARG1:\$[0-9]+]], 0([[VA]])
; NEW-DAG: sd [[ARG1]], 8([[GV]])
diff --git a/llvm/test/CodeGen/Mips/cconv/arguments.ll b/llvm/test/CodeGen/Mips/cconv/arguments.ll
index 2466d59..7af4e55 100644
--- a/llvm/test/CodeGen/Mips/cconv/arguments.ll
+++ b/llvm/test/CodeGen/Mips/cconv/arguments.ll
@@ -55,7 +55,7 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG: daddiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG: ld [[R1:\$[0-9]+]], %got_disp(bytes)(
; The first four arguments are the same in O32/N32/N64
; ALL-DAG: sb $4, 1([[R1]])
@@ -120,9 +120,9 @@
; We won't test the way the global address is calculated in this test. This is
; just to get the register number for the other checks.
; SYM32-DAG: addiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
-; SYM64-DAG: daddiu [[R1:\$[0-9]+]], ${{[0-9]+}}, %lo(bytes)
+; SYM64-DAG: ld [[R1:\$[0-9]+]], %got_disp(bytes)(
; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
-; SYM64-DAG: daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(dwords)
+; SYM64-DAG: ld [[R2:\$[0-9]+]], %got_disp(dwords)(
; The first argument is the same in O32/N32/N64.
; ALL-DAG: sb $4, 1([[R1]])
diff --git a/llvm/test/CodeGen/Mips/cconv/return-float.ll b/llvm/test/CodeGen/Mips/cconv/return-float.ll
index dd457fc..b9a6d6c 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-float.ll
@@ -30,7 +30,8 @@
; O32-DAG: lw $2, %lo(float)([[R1]])
; N32-DAG: lui [[R1:\$[0-9]+]], %hi(float)
; N32-DAG: lw $2, %lo(float)([[R1]])
-; N64-DAG: lw $2, %lo(float)([[R1:\$[0-9+]]])
+; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(float)(
+; N64-DAG: lw $2, 0([[R1]])
define double @retdouble() nounwind {
entry:
@@ -43,4 +44,5 @@
; O32-DAG: addiu [[R2:\$[0-9]+]], [[R1]], %lo(double)
; O32-DAG: lw $3, 4([[R2]])
; N32-DAG: ld $2, %lo(double)([[R1:\$[0-9]+]])
-; N64-DAG: ld $2, %lo(double)([[R1:\$[0-9]+]])
+; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(double)(
+; N64-DAG: ld $2, 0([[R1]])
diff --git a/llvm/test/CodeGen/Mips/cconv/return-hard-float.ll b/llvm/test/CodeGen/Mips/cconv/return-hard-float.ll
index 44ef65e..768cb6a 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-hard-float.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-hard-float.ll
@@ -33,7 +33,8 @@
; O32-DAG: lwc1 $f0, %lo(float)([[R1]])
; N32-DAG: lui [[R1:\$[0-9]+]], %hi(float)
; N32-DAG: lwc1 $f0, %lo(float)([[R1]])
-; N64-DAG: lwc1 $f0, %lo(float)([[R1:\$[0-9+]]])
+; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(float)(
+; N64-DAG: lwc1 $f0, 0([[R1]])
define double @retdouble() nounwind {
entry:
@@ -44,7 +45,8 @@
; ALL-LABEL: retdouble:
; O32-DAG: ldc1 $f0, %lo(double)([[R1:\$[0-9]+]])
; N32-DAG: ldc1 $f0, %lo(double)([[R1:\$[0-9]+]])
-; N64-DAG: ldc1 $f0, %lo(double)([[R1:\$[0-9]+]])
+; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(double)(
+; N64-DAG: ldc1 $f0, 0([[R1]])
define { double, double } @retComplexDouble() #0 {
%retval = alloca { double, double }, align 8
diff --git a/llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll b/llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll
index e527866..bdbfb80 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-hard-fp128.ll
@@ -24,8 +24,8 @@
; N32-DAG: dmtc1 [[R2]], $f0
; N32-DAG: dmtc1 [[R4]], $f2
-; N64-DAG: lui [[R2:\$[0-9]+]], %highest(fp128)
-; N64-DAG: ld [[R3:\$[0-9]+]], %lo(fp128)([[R2]])
+; N64-DAG: ld [[R2:\$[0-9]+]], %got_disp(fp128)([[R1:\$[0-9]+]])
+; N64-DAG: ld [[R3:\$[0-9]+]], 0([[R2]])
; N64-DAG: ld [[R4:\$[0-9]+]], 8([[R2]])
; N64-DAG: dmtc1 [[R3]], $f0
; N64-DAG: dmtc1 [[R4]], $f2
diff --git a/llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll b/llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll
index 492db76..9b178e4 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-hard-struct-f128.ll
@@ -29,8 +29,8 @@
; N32-DAG: ld [[R4:\$[0-9]+]], 8([[R3]])
; N32-DAG: dmtc1 [[R4]], $f1
-; N64-DAG: lui [[R1:\$[0-9]+]], %highest(struct_fp128)
-; N64-DAG: ld [[R2:\$[0-9]+]], %lo(struct_fp128)([[R1]])
+; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(struct_fp128)($1)
+; N64-DAG: ld [[R2:\$[0-9]+]], 0([[R1]])
; N64-DAG: dmtc1 [[R2]], $f0
; N64-DAG: ld [[R4:\$[0-9]+]], 8([[R1]])
; N64-DAG: dmtc1 [[R4]], $f1
diff --git a/llvm/test/CodeGen/Mips/cconv/return-struct.ll b/llvm/test/CodeGen/Mips/cconv/return-struct.ll
index 0997cfb..da20919 100644
--- a/llvm/test/CodeGen/Mips/cconv/return-struct.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return-struct.ll
@@ -37,10 +37,12 @@
; N32-BE-DAG: lb [[R2:\$[0-9]+]], %lo(struct_byte)([[R1]])
; N32-BE-DAG: dsll $2, [[R2]], 56
-; N64-LE-DAG: lb $2, %lo(struct_byte)(${{[0-9]+}})
+; N64-LE-DAG: ld [[R1:\$[0-9]+]], %got_disp(struct_byte)($1)
+; N64-LE-DAG: lb $2, 0([[R1]])
-; N64-BE-DAG: lb [[R1:\$[0-9]+]], %lo(struct_byte)(${{[0-9]+}})
-; N64-BE-DAG: dsll $2, [[R1]], 56
+; N64-BE-DAG: ld [[R1:\$[0-9]+]], %got_disp(struct_byte)($1)
+; N64-BE-DAG: lb [[R2:\$[0-9]+]], 0([[R1]])
+; N64-BE-DAG: dsll $2, [[R2]], 56
; This test is based on the way clang currently lowers {i8,i8} to {i16}.
; FIXME: It should probably work for without any lowering too but this doesn't
@@ -73,15 +75,13 @@
; N32-BE-DAG: lh [[R3:\$[0-9]+]], 8([[SP:\$sp]])
; N32-BE-DAG: dsll $2, [[R3]], 48
-; N64-LE-DAG: daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %hi(struct_2byte)
-; N64-LE-DAG: dsll [[R1:\$[0-9]]], $[[R0]], 16
-; N64-LE-DAG: lhu [[R2:\$[0-9]+]], %lo(struct_2byte)([[R1]])
+; N64-LE-DAG: ld [[R1:\$[0-9]+]], %got_disp(struct_2byte)($1)
+; N64-LE-DAG: lhu [[R2:\$[0-9]+]], 0([[R1]])
; N64-LE-DAG: sh [[R2]], 8([[SP:\$sp]])
; N64-LE-DAG: lh $2, 8([[SP:\$sp]])
-; N64-BE-DAG: daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %hi(struct_2byte)
-; N64-BE-DAG: dsll $[[R1:[0-9]]], $[[R0]], 16
-; N64-BE-DAG: lhu [[R2:\$[0-9]+]], %lo(struct_2byte)($[[R1]])
+; N64-BE-DAG: ld [[R1:\$[0-9]+]], %got_disp(struct_2byte)($1)
+; N64-BE-DAG: lhu [[R2:\$[0-9]+]], 0([[R1]])
; N64-BE-DAG: sh [[R2]], 8([[SP:\$sp]])
; N64-BE-DAG: lh [[R3:\$[0-9]+]], 8([[SP:\$sp]])
; N64-BE-DAG: dsll $2, [[R3]], 48
@@ -126,14 +126,14 @@
; N32-BE-DAG: or [[R4:\$[0-9]+]], [[R3]], [[R2]]
; N32-BE-DAG: dsll $2, [[R4]], 16
-; N64-LE-DAG: daddiu [[PTR:\$[0-9]+]], [[R0:\$[0-9]+]], %lo(struct_3xi16)
+; N64-LE-DAG: ld [[PTR:\$[0-9]+]], %got_disp(struct_3xi16)($1)
; N64-LE-DAG: lh [[R1:\$[0-9]+]], 4([[PTR]])
-; N64-LE-DAG: lwu [[R2:\$[0-9]+]], %lo(struct_3xi16)([[R0]])
+; N64-LE-DAG: lwu [[R2:\$[0-9]+]], 0([[PTR]])
; N64-LE-DAG: dsll [[R3:\$[0-9]+]], [[R1]], 32
; N64-LE-DAG: or $2, [[R2]], [[R3]]
-; N64-BE-DAG: daddiu [[PTR:\$[0-9]+]], [[R0:\$[0-9]+]], %lo(struct_3xi16)
-; N64-BE-DAG: lw [[R1:\$[0-9]+]], %lo(struct_3xi16)([[R0]])
+; N64-BE-DAG: ld [[PTR:\$[0-9]+]], %got_disp(struct_3xi16)($1)
+; N64-BE-DAG: lw [[R1:\$[0-9]+]], 0([[PTR]])
; N64-BE-DAG: dsll [[R2:\$[0-9]+]], [[R1]], 16
; N64-BE-DAG: lhu [[R3:\$[0-9]+]], 4([[PTR]])
; N64-BE-DAG: or [[R4:\$[0-9]+]], [[R3]], [[R2]]
@@ -161,8 +161,9 @@
; N32: jal memcpy
; sret pointer is already in $4
-; N64-DAG: lui ${{[0-9]}}, %highest(struct_128xi16)
-; N64: jal memcpy
+; N64-DAG: ld $5, %got_disp(struct_128xi16)(
+; N64-DAG: ld $25, %call16(memcpy)(
+; N64: jalr $25
; Ensure that large structures (>128-bit) are returned indirectly.
; This will generate inlined memcpy's anyway so pick the smallest large
@@ -213,14 +214,13 @@
; N32-DAG: sw [[T5]], 20([[RET_PTR]])
; sret pointer is already in $4
-; N64-DAG: lui [[PTR_HI:\$[0-9]+]], %highest(struct_6xi32)
-; N64-DAG: daddiu [[PTR:\$[0-9]+]], [[PTR_HI]], %lo(struct_6xi32)
+; N64-DAG: ld [[PTR:\$[0-9]+]], %got_disp(struct_6xi32)(
+; N64-DAG: lw [[T0:\$[0-9]+]], 0([[PTR]])
; N64-DAG: lw [[T1:\$[0-9]+]], 4([[PTR]])
; N64-DAG: lw [[T2:\$[0-9]+]], 8([[PTR]])
; N64-DAG: lw [[T3:\$[0-9]+]], 12([[PTR]])
; N64-DAG: lw [[T4:\$[0-9]+]], 16([[PTR]])
; N64-DAG: lw [[T5:\$[0-9]+]], 20([[PTR]])
-; N64-DAG: lw [[T0:\$[0-9]+]], %lo(struct_6xi32)([[PTR_HI]])
; N64-DAG: sw [[T0]], 0($4)
; N64-DAG: sw [[T1]], 4($4)
; N64-DAG: sw [[T2]], 8($4)
diff --git a/llvm/test/CodeGen/Mips/cconv/return.ll b/llvm/test/CodeGen/Mips/cconv/return.ll
index c2bbe77..561c94c 100644
--- a/llvm/test/CodeGen/Mips/cconv/return.ll
+++ b/llvm/test/CodeGen/Mips/cconv/return.ll
@@ -33,8 +33,8 @@
; O32-DAG: lbu $2, %lo(byte)([[R1]])
; N32-DAG: lui [[R1:\$[0-9]+]], %hi(byte)
; N32-DAG: lbu $2, %lo(byte)([[R1]])
-; N64-DAG: lui [[R1:\$[0-9]+]], %highest(byte)
-; N64-DAG: lbu $2, %lo(byte)([[R1]])
+; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(byte)(
+; N64-DAG: lbu $2, 0([[R1]])
define i32 @reti32() nounwind {
entry:
@@ -47,8 +47,8 @@
; O32-DAG: lw $2, %lo(word)([[R1]])
; N32-DAG: lui [[R1:\$[0-9]+]], %hi(word)
; N32-DAG: lw $2, %lo(word)([[R1]])
-; N64-DAG: lui [[R1:\$[0-9]+]], %highest(word)
-; N64-DAG: lw $2, %lo(word)([[R1]])
+; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(word)(
+; N64-DAG: lw $2, 0([[R1]])
define i64 @reti64() nounwind {
entry:
@@ -62,5 +62,5 @@
; O32-DAG: addiu [[R2:\$[0-9]+]], [[R1]], %lo(dword)
; O32-DAG: lw $3, 4([[R2]])
; N32-DAG: ld $2, %lo(dword)([[R1:\$[0-9]+]])
-; N64-DAG: lui [[R1:\$[0-9]+]], %highest(dword)
-; N64-DAG: ld $2, %lo(dword)([[R1]])
+; N64-DAG: ld [[R1:\$[0-9]+]], %got_disp(dword)([[R1:\$[0-9]+]])
+; N64-DAG: ld $2, 0([[R1]])
diff --git a/llvm/test/CodeGen/Mips/cconv/roundl-call.ll b/llvm/test/CodeGen/Mips/cconv/roundl-call.ll
index 0861197..8e4d659 100644
--- a/llvm/test/CodeGen/Mips/cconv/roundl-call.ll
+++ b/llvm/test/CodeGen/Mips/cconv/roundl-call.ll
@@ -5,8 +5,8 @@
; RUN: llc -march=mips64 -mcpu=mips64 -target-abi=n64 -relocation-model=pic < \
; RUN: %s | FileCheck %s -check-prefixes=ALL,N64,HARD-FLOAT
-; RUN: llc -march=mips64el -mcpu=mips64 -target-abi=n64 -relocation-model=pic \
-; RUN: < %s | FileCheck %s -check-prefixes=ALL,N64,HARD-FLOAT
+; RUN: llc -march=mips64el -mcpu=mips64 -target-abi=n64 -relocation-model=pic < \
+; RUN: %s | FileCheck %s -check-prefixes=ALL,N64,HARD-FLOAT
; RUN: llc -march=mips64 -mcpu=mips64 -mattr=+soft-float -target-abi=n32 \
; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,N32,SOFT-FLOAT
@@ -14,11 +14,9 @@
; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefixes=ALL,N32,SOFT-FLOAT
; RUN: llc -march=mips64 -mcpu=mips64 -mattr=+soft-float -target-abi=n64 < %s \
-; RUN: -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefixes=ALL,N64,SOFT-FLOAT
+; RUN: | FileCheck %s -check-prefixes=ALL,N64,SOFT-FLOAT
; RUN: llc -march=mips64el -mcpu=mips64 -mattr=+soft-float -target-abi=n64 < \
-; RUN: %s -relocation-model=pic | FileCheck %s \
-; RUN: -check-prefixes=ALL,N64,SOFT-FLOAT
+; RUN: %s | FileCheck %s -check-prefixes=ALL,N64,SOFT-FLOAT
@fp128 = global fp128 zeroinitializer
diff --git a/llvm/test/CodeGen/Mips/compactbranches/compact-branches-64.ll b/llvm/test/CodeGen/Mips/compactbranches/compact-branches-64.ll
index 1290acd..cda42a3 100644
--- a/llvm/test/CodeGen/Mips/compactbranches/compact-branches-64.ll
+++ b/llvm/test/CodeGen/Mips/compactbranches/compact-branches-64.ll
@@ -1,5 +1,4 @@
-; RUN: llc -relocation-model=pic -march=mipsel -mcpu=mips64r6 \
-; RUN: -disable-mips-delay-filler -target-abi=n64 < %s | FileCheck %s
+; RUN: llc -march=mipsel -mcpu=mips64r6 -disable-mips-delay-filler -target-abi=n64 < %s | FileCheck %s
; Function Attrs: nounwind
define void @l() {
diff --git a/llvm/test/CodeGen/Mips/compactbranches/compact-branches.ll b/llvm/test/CodeGen/Mips/compactbranches/compact-branches.ll
index ebbeea5..8ec85bc 100644
--- a/llvm/test/CodeGen/Mips/compactbranches/compact-branches.ll
+++ b/llvm/test/CodeGen/Mips/compactbranches/compact-branches.ll
@@ -1,7 +1,5 @@
-; RUN: llc -march=mipsel -mcpu=mips32r6 -relocation-model=static \
-; RUN: -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=STATIC32
-; RUN: llc -march=mipsel -mcpu=mips64r6 -relocation-model=pic -target-abi n64 \
-; RUN: -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=PIC
+; RUN: llc -march=mipsel -mcpu=mips32r6 -relocation-model=static -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=STATIC32
+; RUN: llc -march=mipsel -mcpu=mips64r6 -target-abi n64 -disable-mips-delay-filler < %s | FileCheck %s -check-prefix=PIC
; Function Attrs: nounwind
define void @l() {
diff --git a/llvm/test/CodeGen/Mips/cstmaterialization/stack.ll b/llvm/test/CodeGen/Mips/cstmaterialization/stack.ll
index 41b5bf6..7266d00 100644
--- a/llvm/test/CodeGen/Mips/cstmaterialization/stack.ll
+++ b/llvm/test/CodeGen/Mips/cstmaterialization/stack.ll
@@ -1,5 +1,5 @@
; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefix=CHECK-MIPS32
-; RUN: llc -march=mips64el -mcpu=mips64 -relocation-model=pic < %s | \
+; RUN: llc -march=mips64el -mcpu=mips64 < %s | \
; RUN: FileCheck %s -check-prefix=CHECK-MIPS64
; RUN: llc -march=mipsel -mcpu=mips64 -target-abi n32 < %s | \
; RUN: FileCheck %s -check-prefix=CHECK-MIPSN32
diff --git a/llvm/test/CodeGen/Mips/elf_eflags.ll b/llvm/test/CodeGen/Mips/elf_eflags.ll
index 80b9c48..40910d8 100644
--- a/llvm/test/CodeGen/Mips/elf_eflags.ll
+++ b/llvm/test/CodeGen/Mips/elf_eflags.ll
@@ -14,6 +14,7 @@
; EF_MIPS_ARCH_64R2 (0x80000000)
; Note that EF_MIPS_CPIC is set by -mabicalls which is the default on Linux
+; TODO need to support -mno-abicalls
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE32 %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | FileCheck -check-prefix=CHECK-LE32_PIC %s
@@ -23,12 +24,12 @@
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MICROMIPS_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -target-abi n64 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips4 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 -relocation-model=static %s -o - | FileCheck -check-prefix=CHECK-LE64R2 %s
-; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE64R2_PIC %s
+; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 %s -o - | FileCheck -check-prefix=CHECK-LE64R2_PIC %s
; RUN: llc -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s
@@ -60,6 +61,7 @@
; CHECK-LE32R2-MICROMIPS_PIC: .set micromips
;
; 64(R1) bit with NO_REORDER and static
+; CHECK-LE64: .abicalls
; CHECK-LE64: .set noreorder
;
; 64(R1) bit with NO_REORDER and PIC
@@ -67,6 +69,7 @@
; CHECK-LE64_PIC: .set noreorder
;
; 64R2 bit with NO_REORDER and static
+; CHECK-LE64R2: .abicalls
; CHECK-LE64R2: .set noreorder
;
; 64R2 bit with NO_REORDER and PIC
diff --git a/llvm/test/CodeGen/Mips/fcmp.ll b/llvm/test/CodeGen/Mips/fcmp.ll
index eb6c06d..e22b12a 100644
--- a/llvm/test/CodeGen/Mips/fcmp.ll
+++ b/llvm/test/CodeGen/Mips/fcmp.ll
@@ -1076,12 +1076,12 @@
; 32-CMP-DAG: bnezc $[[T4]],
; 64-C-DAG: add.s $[[T0:f[0-9]+]], $f13, $f12
-; 64-C-DAG: lwc1 $[[T1:f[0-9]+]], %lo(.LCPI32_0)(
+; 64-C-DAG: lwc1 $[[T1:f[0-9]+]], %got_ofst(.LCPI32_0)(
; 64-C-DAG: c.ole.s $[[T0]], $[[T1]]
; 64-C-DAG: bc1t
; 64-CMP-DAG: add.s $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: lwc1 $[[T1:f[0-9]+]], %lo(.LCPI32_0)(
+; 64-CMP-DAG: lwc1 $[[T1:f[0-9]+]], %got_ofst(.LCPI32_0)(
; 64-CMP-DAG: cmp.le.s $[[T2:f[0-9]+]], $[[T0]], $[[T1]]
; 64-CMP-DAG: mfc1 $[[T3:[0-9]+]], $[[T2]]
; FIXME: This instruction is redundant.
@@ -1102,17 +1102,16 @@
; MM32R6-DAG: andi16 $[[T5:[0-9]+]], $[[T4]], 1
; MM32R6-DAG: bnez $[[T5]],
-; MM64R6-DAG: add.s $[[T0:f[0-9]+]], $f13, $f12
-; MM64R6-DAG: lui $[[T1:[0-9]+]], %highest(.LCPI32_0)
-; MM64R6-DAG: daddiu $[[T2:[0-9]+]], $[[T1]], %higher(.LCPI32_0)
-; MM64R6-DAG: dsll $[[T3:[0-9]+]], $[[T2]], 16
-; MM64R6-DAG: daddiu $[[T4:[0-9]+]], $[[T3]], %hi(.LCPI32_0)
-; MM64R6-DAG: dsll $[[T5:[0-9]+]], $[[T4]], 16
-; MM64R6-DAG: lwc1 $[[T6:f[0-9]+]], %lo(.LCPI32_0)($[[T5]])
-; MM64R6-DAG: cmp.le.s $[[T7:f[0-9]+]], $[[T0]], $[[T6]]
-; MM64R6-DAG: mfc1 $[[T8:[0-9]+]], $[[T7]]
-; MM64R6-DAG: andi16 $[[T9:[0-9]+]], $[[T8]], 1
-; MM64R6-DAG: bnez $[[T9]],
+; MM64R6-DAG: lui $[[T0:[0-9]+]], %hi(%neg(%gp_rel(bug1_f32)))
+; MM64R6-DAG: daddu $[[T1:[0-9]+]], $[[T0]], $25
+; MM64R6-DAG: daddiu $[[T2:[0-9]+]], $[[T1]], %lo(%neg(%gp_rel(bug1_f32)))
+; MM64R6-DAG: add.s $[[T3:f[0-9]+]], $f13, $f12
+; MM64R6-DAG: ld $[[T4:[0-9]+]], %got_page(.LCPI32_0)($[[T2]])
+; MM64R6-DAG: lwc1 $[[T5:f[0-9]+]], %got_ofst(.LCPI32_0)($[[T4]])
+; MM64R6-DAG: cmp.le.s $[[T6:f[0-9]+]], $[[T3]], $[[T5]]
+; MM64R6-DAG: mfc1 $[[T7:[0-9]+]], $[[T6]]
+; MM64R6-DAG: andi16 $[[T8:[0-9]+]], $[[T7]], 1
+; MM64R6-DAG: bnez $[[T8]],
%add = fadd fast float %at, %angle
%cmp = fcmp ogt float %add, 1.000000e+00
@@ -1146,12 +1145,12 @@
; 32-CMP-DAG: bnezc $[[T4]],
; 64-C-DAG: add.d $[[T0:f[0-9]+]], $f13, $f12
-; 64-C-DAG: ldc1 $[[T1:f[0-9]+]], %lo(.LCPI33_0)(
+; 64-C-DAG: ldc1 $[[T1:f[0-9]+]], %got_ofst(.LCPI33_0)(
; 64-C-DAG: c.ole.d $[[T0]], $[[T1]]
; 64-C-DAG: bc1t
; 64-CMP-DAG: add.d $[[T0:f[0-9]+]], $f13, $f12
-; 64-CMP-DAG: ldc1 $[[T1:f[0-9]+]], %lo(.LCPI33_0)(
+; 64-CMP-DAG: ldc1 $[[T1:f[0-9]+]], %got_ofst(.LCPI33_0)(
; 64-CMP-DAG: cmp.le.d $[[T2:f[0-9]+]], $[[T0]], $[[T1]]
; 64-CMP-DAG: mfc1 $[[T3:[0-9]+]], $[[T2]]
; FIXME: This instruction is redundant.
@@ -1172,17 +1171,16 @@
; MM32R6-DAG: andi16 $[[T5:[0-9]+]], $[[T4]], 1
; MM32R6-DAG: bnez $[[T5]],
-; MM64R6-DAG: add.d $[[T0:f[0-9]+]], $f13, $f12
-; MM64R6-DAG: lui $[[T1:[0-9]+]], %highest(.LCPI33_0)
-; MM64R6-DAG: daddiu $[[T2:[0-9]+]], $[[T1]], %higher(.LCPI33_0)
-; MM64R6-DAG: dsll $[[T3:[0-9]+]], $[[T2]], 16
-; MM64R6-DAG: daddiu $[[T4:[0-9]+]], $[[T3]], %hi(.LCPI33_0)
-; MM64R6-DAG: dsll $[[T5:[0-9]+]], $[[T4]], 16
-; MM64R6-DAG: ldc1 $[[T6:f[0-9]+]], %lo(.LCPI33_0)($[[T5]])
-; MM64R6-DAG: cmp.le.d $[[T7:f[0-9]+]], $[[T0]], $[[T6]]
-; MM64R6-DAG: mfc1 $[[T8:[0-9]+]], $[[T7]]
-; MM64R6-DAG: andi16 $[[T9:[0-9]+]], $[[T8]], 1
-; MM64R6-DAG: bnez $[[T9]],
+; MM64R6-DAG: lui $[[T0:[0-9]+]], %hi(%neg(%gp_rel(bug1_f64)))
+; MM64R6-DAG: daddu $[[T1:[0-9]+]], $[[T0]], $25
+; MM64R6-DAG: daddiu $[[T2:[0-9]+]], $[[T1]], %lo(%neg(%gp_rel(bug1_f64)))
+; MM64R6-DAG: add.d $[[T3:f[0-9]+]], $f13, $f12
+; MM64R6-DAG: ld $[[T4:[0-9]+]], %got_page(.LCPI33_0)($[[T2]])
+; MM64R6-DAG: ldc1 $[[T5:f[0-9]+]], %got_ofst(.LCPI33_0)($[[T4]])
+; MM64R6-DAG: cmp.le.d $[[T6:f[0-9]+]], $[[T3]], $[[T5]]
+; MM64R6-DAG: mfc1 $[[T7:[0-9]+]], $[[T6]]
+; MM64R6-DAG: andi16 $[[T8:[0-9]+]], $[[T7]], 1
+; MM64R6-DAG: bnez $[[T8]],
%add = fadd fast double %at, %angle
%cmp = fcmp ogt double %add, 1.000000e+00
diff --git a/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll b/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll
index e0229d1..a3ea22f 100644
--- a/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll
+++ b/llvm/test/CodeGen/Mips/fcopysign-f32-f64.ll
@@ -36,12 +36,12 @@
entry:
; ALL-LABEL: func3:
-; 64: mfc1 $[[MFC:[0-9]+]], $f13
-; 64: daddiu $[[R1:[0-9]+]], $zero, 1
; 64: dmfc1 $[[R0:[0-9]+]], ${{.*}}
+; 64: daddiu $[[R1:[0-9]+]], $zero, 1
; 64: dsll $[[R2:[0-9]+]], $[[R1]], 63
; 64: daddiu $[[R3:[0-9]+]], $[[R2]], -1
; 64: and $[[AND0:[0-9]+]], $[[R0]], $[[R3]]
+; 64: mfc1 $[[MFC:[0-9]+]], $f13
; 64: srl $[[SRL:[0-9]+]], $[[MFC:[0-9]+]], 31
; 64: dsll $[[DSLL:[0-9]+]], $[[SRL]], 63
; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]]
diff --git a/llvm/test/CodeGen/Mips/global-address.ll b/llvm/test/CodeGen/Mips/global-address.ll
index ed79de9..ecf5e56 100644
--- a/llvm/test/CodeGen/Mips/global-address.ll
+++ b/llvm/test/CodeGen/Mips/global-address.ll
@@ -29,15 +29,9 @@
; PIC-N64: ld $[[R0:[0-9]+]], %got_page(s1)
; PIC-N64: lw ${{[0-9]+}}, %got_ofst(s1)($[[R0]])
; PIC-N64: ld ${{[0-9]+}}, %got_disp(g1)
-; STATIC-N64: lui $[[R1:[0-9]+]], %highest(s1)
-; STATIC-N64: daddiu ${{[0-9]+}}, ${{[0-9]+}}, %higher(s1)
-; STATIC-N64: daddiu ${{[0-9]+}}, ${{[0-9]+}}, %hi(s1)
-; STATIC-N64: dsll $[[R2:[0-9]+]], $[[R1]], 16
-; STATIC-N64: lw ${{[0-9]+}}, %lo(s1)($[[R2]])
-; STATIC-N64: lui $[[R3:[0-9]+]], %highest(g1)
-; STATIC-N64: daddiu $[[R3]], $[[R3]], %higher(g1)
-; STATIC-N64: daddiu $[[R3]], $[[R3]], %hi(g1)
-; STATIC-N64: lw ${{[0-9]+}}, %lo(g1)($[[R3]])
+; STATIC-N64: ld $[[R1:[0-9]+]], %got_page(s1)
+; STATIC-N64: lw ${{[0-9]+}}, %got_ofst(s1)($[[R1]])
+; STATIC-N64: ld ${{[0-9]+}}, %got_disp(g1)
%0 = load i32, i32* @s1, align 4
tail call void @foo1(i32 %0) nounwind
diff --git a/llvm/test/CodeGen/Mips/inlineasm-constraint_ZC_2.ll b/llvm/test/CodeGen/Mips/inlineasm-constraint_ZC_2.ll
index 2a0904c..a99cb97 100644
--- a/llvm/test/CodeGen/Mips/inlineasm-constraint_ZC_2.ll
+++ b/llvm/test/CodeGen/Mips/inlineasm-constraint_ZC_2.ll
@@ -1,9 +1,7 @@
; RUN: llc -march=mips -mcpu=mips32r6 < %s | FileCheck %s --check-prefixes=ALL,R6
-; RUN: llc -march=mips -mcpu=mips64r6 -target-abi=n64 -relocation-model=pic \
-; RUN: < %s | FileCheck %s --check-prefixes=ALL,R6
+; RUN: llc -march=mips -mcpu=mips64r6 -target-abi=n64 < %s | FileCheck %s --check-prefixes=ALL,R6
; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s --check-prefixes=ALL,PRER6
-; RUN: llc -march=mips -mcpu=mips64 -target-abi=n64 -relocation-model=pic \
-; RUN: < %s | FileCheck %s --check-prefixes=ALL,PRER6
+; RUN: llc -march=mips -mcpu=mips64 -target-abi=n64 < %s | FileCheck %s --check-prefixes=ALL,PRER6
%struct.anon = type { [63 x i32], i32, i32 }
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/call.ll b/llvm/test/CodeGen/Mips/llvm-ir/call.ll
index a036faf..9af3e8d 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/call.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/call.ll
@@ -6,24 +6,24 @@
; RUN: llc -march=mips -mcpu=mips32r5 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,NOT-R6C
; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,R6C
; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,O32,R6C
-; RUN: llc -march=mips64 -mcpu=mips4 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64r2 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64r3 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64r5 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64r6 -relocation-model=pic -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,R6C
+; RUN: llc -march=mips64 -mcpu=mips4 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64r2 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64r3 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64r5 -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64r6 -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64,R6C
; RUN: llc -march=mips -mcpu=mips32 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=NOT-R6C
; RUN: llc -march=mips -mcpu=mips32r2 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=NOT-R6C
; RUN: llc -march=mips -mcpu=mips32r3 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=NOT-R6C
; RUN: llc -march=mips -mcpu=mips32r5 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=NOT-R6C
; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=R6C
; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=O32 -check-prefix=R6C
-; RUN: llc -march=mips64 -mcpu=mips4 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64r2 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64r3 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64r5 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
-; RUN: llc -march=mips64 -mcpu=mips64r6 -relocation-model=pic -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=R6C
+; RUN: llc -march=mips64 -mcpu=mips4 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64r2 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64r3 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64r5 -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=NOT-R6C
+; RUN: llc -march=mips64 -mcpu=mips64r6 -disable-mips-delay-filler -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=ALL -check-prefix=N64 -check-prefix=R6C
declare void @extern_void_void()
declare i32 @extern_i32_void()
diff --git a/llvm/test/CodeGen/Mips/mips64-f128-call.ll b/llvm/test/CodeGen/Mips/mips64-f128-call.ll
index c59f25e..9a093e6 100644
--- a/llvm/test/CodeGen/Mips/mips64-f128-call.ll
+++ b/llvm/test/CodeGen/Mips/mips64-f128-call.ll
@@ -4,8 +4,8 @@
@gld1 = external global fp128
; CHECK: foo0
-; CHECK: sdc1 $f12, %lo(gld0)(${{[0-9]+}})
; CHECK: sdc1 $f13, 8(${{[0-9]+}})
+; CHECK: sdc1 $f12, 0(${{[0-9]+}})
define void @foo0(fp128 %a0) {
entry:
@@ -14,8 +14,8 @@
}
; CHECK: foo1
-; CHECK: ldc1 $f12, %lo(gld0)(${{[0-9]+}})
; CHECK: ldc1 $f13, 8(${{[0-9]+}})
+; CHECK: ldc1 $f12, 0(${{[0-9]+}})
define void @foo1() {
entry:
@@ -26,19 +26,13 @@
declare void @foo2(fp128)
-; CHECK: foo3:
-; CHECK: daddiu $[[R0:[0-9]+]], ${{[0-9]+}}, %hi(gld0)
-; CHECK: dsll $[[R1:[0-9]+]], $[[R0]], 16
-; CHECK: sdc1 $f0, %lo(gld0)($[[R1]])
-; CHECK: daddiu $[[R2:[0-9]]], $[[R1]], %lo(gld0)
-; CHECK: sdc1 $f2, 8($[[R2]])
-; CHECK: daddiu $[[R3:[0-9]+]], ${{[0-9]+}}, %hi(gld1)
-; CHECK: dsll $[[R4:[0-9]+]], $[[R3]], 16
-; CHECK: ldc1 $f0, %lo(gld1)($[[R4]])
-; CHECK: daddiu $[[R5:[0-9]]], $[[R4]], %lo(gld1)
-; CHECK: ldc1 $f2, 8($[[R5]])
-
-
+; CHECK: foo3
+; CHECK: ld $[[R0:[0-9]+]], %got_disp(gld0)
+; CHECK: sdc1 $f2, 8($[[R0]])
+; CHECK: sdc1 $f0, 0($[[R0]])
+; CHECK: ld $[[R1:[0-9]+]], %got_disp(gld1)
+; CHECK: ldc1 $f0, 0($[[R1]])
+; CHECK: ldc1 $f2, 8($[[R1]])
define fp128 @foo3() {
entry:
diff --git a/llvm/test/CodeGen/Mips/mips64-f128.ll b/llvm/test/CodeGen/Mips/mips64-f128.ll
index 304ab8b..2b1c154 100644
--- a/llvm/test/CodeGen/Mips/mips64-f128.ll
+++ b/llvm/test/CodeGen/Mips/mips64-f128.ll
@@ -1,15 +1,11 @@
; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips4 -mattr=+soft-float -O1 \
-; RUN: -disable-mips-delay-filler -relocation-model=pic < %s | FileCheck \
-; RUN: %s -check-prefixes=ALL,C_CC_FMT,PRER6
+; RUN: -disable-mips-delay-filler < %s | FileCheck %s -check-prefixes=ALL,C_CC_FMT,PRER6
; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64 -mattr=+soft-float -O1 \
-; RUN: -disable-mips-delay-filler -relocation-model=pic < %s | FileCheck \
-; RUN: %s -check-prefixes=ALL,C_CC_FMT,PRER6
-; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64r2 -mattr=+soft-float \
-; RUN: -O1 -disable-mips-delay-filler -relocation-model=pic < %s | FileCheck \
-; RUN: %s -check-prefixes=ALL,C_CC_FMT,PRER6
-; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64r6 -mattr=+soft-float \
-; RUN: -O1 -disable-mips-delay-filler -relocation-model=pic < %s | FileCheck \
-; RUN: %s -check-prefixes=ALL,CMP_CC_FMT,R6
+; RUN: -disable-mips-delay-filler < %s | FileCheck %s -check-prefixes=ALL,C_CC_FMT,PRER6
+; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64r2 -mattr=+soft-float -O1 \
+; RUN: -disable-mips-delay-filler < %s | FileCheck %s -check-prefixes=ALL,C_CC_FMT,PRER6
+; RUN: llc -mtriple=mips64el-unknown-unknown -mcpu=mips64r6 -mattr=+soft-float -O1 \
+; RUN: -disable-mips-delay-filler < %s | FileCheck %s -check-prefixes=ALL,CMP_CC_FMT,R6
@gld0 = external global fp128
@gld1 = external global fp128
diff --git a/llvm/test/CodeGen/Mips/mips64-libcall.ll b/llvm/test/CodeGen/Mips/mips64-libcall.ll
index 7c0e5b2..8512e9f 100644
--- a/llvm/test/CodeGen/Mips/mips64-libcall.ll
+++ b/llvm/test/CodeGen/Mips/mips64-libcall.ll
@@ -20,7 +20,7 @@
; Check call16.
;
; SOFT-LABEL: f64add:
-; SOFT: jal __adddf3
+; SOFT: ld $25, %call16(__adddf3)
define double @f64add(double %a, double %b) {
entry:
diff --git a/llvm/test/CodeGen/Mips/mips64instrs.ll b/llvm/test/CodeGen/Mips/mips64instrs.ll
index c08c1b7..8f124c8 100644
--- a/llvm/test/CodeGen/Mips/mips64instrs.ll
+++ b/llvm/test/CodeGen/Mips/mips64instrs.ll
@@ -111,8 +111,10 @@
define i64 @f14(i64 %a, i64 %b) nounwind readnone {
entry:
; ALL-LABEL: f14:
-; ALL-DAG: ld $[[T0:[0-9]+]], %lo(gll0)(${{[0-9]+}})
-; ALL-DAG: ld $[[T1:[0-9]+]], %lo(gll1)(${{[0-9]+}})
+; ALL-DAG: ld $[[P0:[0-9]+]], %got_disp(gll0)(
+; ALL-DAG: ld $[[P1:[0-9]+]], %got_disp(gll1)(
+; ALL-DAG: ld $[[T0:[0-9]+]], 0($[[P0]])
+; ALL-DAG: ld $[[T1:[0-9]+]], 0($[[P1]])
; ACCMULDIV: ddiv $zero, $[[T0]], $[[T1]]
; ACCMULDIV: teq $[[T1]], $zero, 7
@@ -130,8 +132,10 @@
define i64 @f15() nounwind readnone {
entry:
; ALL-LABEL: f15:
-; ALL-DAG: ld $[[T0:[0-9]+]], %lo(gll0)(${{[0-9]+}})
-; ALL-DAG: ld $[[T1:[0-9]+]], %lo(gll1)(${{[0-9]+}})
+; ALL-DAG: ld $[[P0:[0-9]+]], %got_disp(gll0)(
+; ALL-DAG: ld $[[P1:[0-9]+]], %got_disp(gll1)(
+; ALL-DAG: ld $[[T0:[0-9]+]], 0($[[P0]])
+; ALL-DAG: ld $[[T1:[0-9]+]], 0($[[P1]])
; ACCMULDIV: ddivu $zero, $[[T0]], $[[T1]]
; ACCMULDIV: teq $[[T1]], $zero, 7
diff --git a/llvm/test/CodeGen/Mips/start-asm-file.ll b/llvm/test/CodeGen/Mips/start-asm-file.ll
index bcea5da..6d0a542 100644
--- a/llvm/test/CodeGen/Mips/start-asm-file.ll
+++ b/llvm/test/CodeGen/Mips/start-asm-file.ll
@@ -75,7 +75,7 @@
; CHECK-PIC-N32-NLEGACY: .nan legacy
; CHECK-PIC-N32-N2008: .nan 2008
-; CHECK-STATIC-N64-NOT: .abicalls
+; CHECK-STATIC-N64: .abicalls
; CHECK-STATIC-N64-NOT: .option pic0
; CHECK-STATIC-N64: .section .mdebug.abi64
; CHECK-STATIC-N64-NLEGACY: .nan legacy
diff --git a/llvm/test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll b/llvm/test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll
index 25a5e5b..6b09b69 100644
--- a/llvm/test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll
+++ b/llvm/test/CodeGen/Mips/tailcall/tailcall-wrong-isa.ll
@@ -4,11 +4,8 @@
; RUN: llc -filetype=obj -march=mipsel -relocation-model=static -verify-machineinstrs -mips-tail-calls=1 < %s -o - \
; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=STATIC32
-; RUN: llc -filetype=obj -march=mips64el -relocation-model=pic -mcpu=mips64 -verify-machineinstrs -mips-tail-calls=1 < %s -o - \
-; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=PIC64
-
-; RUN: llc -filetype=obj -march=mips64el -relocation-model=static -mcpu=mips64 -verify-machineinstrs -mips-tail-calls=1 < %s -o - \
-; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=STATIC64
+; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 -verify-machineinstrs -mips-tail-calls=1 < %s -o - \
+; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=N64
; RUN: llc -filetype=obj -march=mipsel -relocation-model=pic -mattr=+micromips -mips-tail-calls=1 < %s -o - \
; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=PIC32MM
@@ -21,11 +18,8 @@
; RUN: llc -filetype=obj -march=mipsel -relocation-model=static -mcpu=mips32r6 -mips-tail-calls=1 < %s -o - \
; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=STATIC32R6
-; RUN: llc -filetype=obj -march=mips64el -relocation-model=pic -mcpu=mips64r6 -mips-tail-calls=1 < %s -o - \
-; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=PIC64R6
-; RUN: llc -filetype=obj -march=mips64el -relocation-model=static -mcpu=mips64r6 -mips-tail-calls=1 < %s -o - \
-; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=STATIC64R6
-
+; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64r6 -mips-tail-calls=1 < %s -o - \
+; RUN: | llvm-objdump -d - | FileCheck %s -check-prefix=N64R6
define internal i8 @f2(i8) {
ret i8 4
@@ -40,8 +34,7 @@
; PIC32: {{[0-9a-z]}}: 08 00 20 03 jr $25
; STATIC32: {{[0-9a-z]}}: 00 00 00 08 j 0
-; PIC64: {{[0-9a-z]+}}: 08 00 20 03 jr $25
-; STATIC64: {{[0-9]}}: 00 00 00 08 j 0
+; N64: {{[0-9a-z]+}}: 08 00 20 03 jr $25
; PIC32MM: {{[0-9a-z]+}}: b9 45 jrc $25
; STATIC32MM: {{[0-9a-z]}}: 00 d4 00 00 j 0
@@ -49,5 +42,5 @@
; PIC32R6: {{[0-9a-z]}}: 00 00 19 d8 jrc $25
; STATIC32R6: {{[0-9a-z]}}: 00 00 00 08 j 0
-; PIC64R6: {{[0-9a-z]+}}: 00 00 19 d8 jrc $25
-; STATIC64R6: {{[0-9]}}: 00 00 00 08 j 0
+; N64R6: {{[0-9a-z]+}}: 00 00 19 d8 jrc $25
+
diff --git a/llvm/test/CodeGen/Mips/tailcall/tailcall.ll b/llvm/test/CodeGen/Mips/tailcall/tailcall.ll
index 3f04e1c..b0ac28d 100644
--- a/llvm/test/CodeGen/Mips/tailcall/tailcall.ll
+++ b/llvm/test/CodeGen/Mips/tailcall/tailcall.ll
@@ -2,10 +2,8 @@
; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32
; RUN: llc -march=mipsel -relocation-model=static \
; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
-; RUN: llc -march=mips64el -mcpu=mips64r2 -relocation-model=pic \
-; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC64
-; RUN: llc -march=mips64el -mcpu=mips64r2 -relocation-model=static \
-; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC64
+; RUN: llc -march=mips64el -mcpu=mips64r2 \
+; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64
; RUN: llc -march=mipsel -mattr=mips16 -relocation-model=pic \
; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | \
; RUN: FileCheck %s -check-prefixes=ALL,PIC16
@@ -17,21 +15,17 @@
; RUN: llc -march=mipsel -relocation-model=pic -mcpu=mips32r6 -mips-tail-calls=1 < %s | \
; RUN: FileCheck %s -check-prefixes=ALL,PIC32R6
-; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r2 \
+; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r6 \
; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
-; RUN: llc -march=mips64el -relocation-model=pic -mcpu=mips64r2 \
-; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=PIC64
-; RUN: llc -march=mips64el -relocation-model=pic -mcpu=mips64r6 \
-; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=STATIC64
+; RUN: llc -march=mips64el -mcpu=mips64r6 \
+; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,N64R6
; RUN: llc -march=mipsel -relocation-model=pic -mcpu=mips32r6 -mattr=+micromips \
; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32MM
; RUN: llc -march=mipsel -relocation-model=static -mcpu=mips32r6 \
; RUN: -mattr=+micromips -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32
-; RUN: llc -march=mips64el -relocation-model=pic -mcpu=mips64r6 \
-; RUN: -mattr=+micromips -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=PIC64R6MM
-; RUN: llc -march=mips64el -relocation-model=static -mcpu=mips64r6 \
-; RUN: -mattr=+micromips -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=STATIC64
+; RUN: llc -march=mips64el -mcpu=mips64r6 -mattr=+micromips -mips-tail-calls=1 < %s \
+; RUN: | FileCheck %s -check-prefixes=ALL,N64
@g0 = common global i32 0, align 4
@g1 = common global i32 0, align 4
@@ -102,8 +96,7 @@
; PIC32R6: jalr $25
; PIC32MM: jalr $25
; STATIC32: jal
-; PIC64: jalr $25
-; STATIC64: jal
+; N64: jalr $25
; N64R6: jalr $25
; PIC16: jalrc
@@ -120,8 +113,8 @@
; PIC32R6: jr $25
; PIC32MM: jr
; STATIC32: j
-; PIC64: jr $25
-; STATIC64: j
+; N64: jr $25
+; N64R6: jr $25
; PIC16: jalrc
%0 = load i32, i32* @g0, align 4
@@ -161,10 +154,8 @@
; PIC32R6: jrc $25
; PIC32MM: jrc
; STATIC32: j
-; PIC64: jr $25
-; PIC64R6: jrc $25
-; PIC64R6MM: jr $25
-; STATIC64: j
+; N64: jr $25
+; N64R6: jrc $25
; PIC16: jalrc
%call = tail call fastcc i32 @caller8_1()
@@ -178,8 +169,8 @@
; PIC32R6: jalr $25
; PIC32MM: jalr $25
; STATIC32: jal
-; PIC64: jalr $25
-; STATIC64: jal
+; N64: jalr $25
+; N64R6: jalr $25
; PIC16: jalrc
%call = tail call i32 (i32, ...) @callee8(i32 2, i32 1) nounwind
@@ -199,9 +190,8 @@
; PIC32R6: jrc $25
; PIC32MM: jrc
; STATIC32: j
-; PIC64: jr $25
-; STATIC64: j
-; PIC64R6: jrc $25
+; N64: jr $25
+; N64R6: jrc $25
; PIC16: jalrc
%call = tail call fastcc i32 @caller9_1()
ret i32 %call
@@ -214,9 +204,8 @@
; PIC32R6: jalrc $25
; PIC32MM: jalr $25
; STATIC32: jal
-; STATIC64: jal
-; PIC64: jalr $25
-; PIC64R6: jalrc $25
+; N64: jalr $25
+; N64R6: jalrc $25
; PIC16: jalrc
%call = tail call i32 @callee9(%struct.S* byval @gs1) nounwind
@@ -232,9 +221,8 @@
; PIC32R6: jalr $25
; PIC32MM: jalr $25
; STATIC32: jal
-; STATIC64: jal
-; PIC64: jalr $25
-; PIC64R6: jalr $25
+; N64: jalr $25
+; N64R6: jalr $25
; PIC16: jalrc
%call = tail call i32 @callee10(i32 %a8, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind
@@ -250,9 +238,8 @@
; PIC32R6: jalrc $25
; PIC32MM: jalr $25
; STATIC32: jal
-; STATIC64: jal
-; PIC64: jalr $25
-; PIC64R6: jalrc $25
+; N64: jalr $25
+; N64R6: jalrc $25
; PIC16: jalrc
%call = tail call i32 @callee11(%struct.S* byval @gs1) nounwind
@@ -270,9 +257,8 @@
; PIC32R6: jalrc $25
; PIC32MM: jalr $25
; STATIC32: jal
-; STATIC64: jal
-; PIC64: jalr $25
-; PIC64R6: jalrc $25
+; N64: jalr $25
+; N64R6: jalrc $25
; PIC16: jalrc
%0 = bitcast %struct.S* %a0 to i8*
@@ -285,14 +271,13 @@
define i32 @caller13() nounwind {
entry:
-; ALL-LABEL: caller13:
+; ALL-LABEL: caller13
; PIC32: jalr $25
; PIC32R6: jalr $25
; PIC32MM: jalr $25
; STATIC32: jal
-; STATIC64: jal
-; PIC64R6: jalr $25
-; PIC64: jalr $25
+; N64: jalr $25
+; N64R6: jalr $25
; PIC16: jalrc
%call = tail call i32 (i32, ...) @callee13(i32 1, i32 2) nounwind
diff --git a/llvm/test/MC/Mips/elf_eflags.s b/llvm/test/MC/Mips/elf_eflags.s
index 38742a8..244b07d 100644
--- a/llvm/test/MC/Mips/elf_eflags.s
+++ b/llvm/test/MC/Mips/elf_eflags.s
@@ -2,48 +2,26 @@
# corresponding options (-mcpu=mips32 -> -mips32 for example).
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6 %s
-# MIPSEL-MIPS64R6: Flags [ (0xA0000400)
+# MIPSEL-MIPS64R6: Flags [ (0xA0000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r6 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6-NAN2008 %s
-# MIPSEL-MIPS64R6-NAN2008: Flags [ (0xA0000400)
+# MIPSEL-MIPS64R6-NAN2008: Flags [ (0xA0000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2 %s
-# MIPSEL-MIPS64R2: Flags [ (0x80000000)
+# MIPSEL-MIPS64R2: Flags [ (0x80000006)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r2 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r3 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64r5 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008 %s
-# MIPSEL-MIPS64R2-NAN2008: Flags [ (0x80000400)
+# MIPSEL-MIPS64R2-NAN2008: Flags [ (0x80000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64 %s
-# MIPSEL-MIPS64: Flags [ (0x60000000)
+# MIPSEL-MIPS64: Flags [ (0x60000006)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips64 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-NAN2008 %s
-# MIPSEL-MIPS64-NAN2008: Flags [ (0x60000400)
-
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64r6 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6-PIC %s
-# MIPSEL-MIPS64R6-PIC: Flags [ (0xA0000406)
-
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64r6 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R6-NAN2008-PIC %s
-# MIPSEL-MIPS64R6-NAN2008-PIC: Flags [ (0xA0000406)
-
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64r2 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-PIC %s
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64r3 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-PIC %s
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64r5 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-PIC %s
-# MIPSEL-MIPS64R2-PIC: Flags [ (0x80000006)
-
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64r2 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008-PIC %s
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64r3 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008-PIC %s
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64r5 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64R2-NAN2008-PIC %s
-# MIPSEL-MIPS64R2-NAN2008-PIC: Flags [ (0x80000406)
-
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-PIC %s
-# MIPSEL-MIPS64-PIC: Flags [ (0x60000006)
-
-# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -position-independent -mcpu=mips64 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS64-NAN2008-PIC %s
-# MIPSEL-MIPS64-NAN2008-PIC: Flags [ (0x60000406)
+# MIPSEL-MIPS64-NAN2008: Flags [ (0x60000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips32r6 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS32R6 %s
# MIPSEL-MIPS32R6: Flags [ (0x90001404)
@@ -81,28 +59,16 @@
# MIPS64EL-MIPS64-N32-NAN2008: Flags [ (0x60000424)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N64 %s
-# MIPS64EL-MIPS64R2-N64: Flags [ (0x80000000)
+# MIPS64EL-MIPS64R2-N64: Flags [ (0x80000006)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N64-NAN2008 %s
-# MIPS64EL-MIPS64R2-N64-NAN2008: Flags [ (0x80000400)
+# MIPS64EL-MIPS64R2-N64-NAN2008: Flags [ (0x80000406)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -target-abi n64 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N64 %s
-# MIPS64EL-MIPS64-N64: Flags [ (0x60000000)
+# MIPS64EL-MIPS64-N64: Flags [ (0x60000006)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -target-abi n64 -mattr=+nan2008 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N64-NAN2008 %s
-# MIPS64EL-MIPS64-N64-NAN2008: Flags [ (0x60000400)
-
-# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -position-independent -mcpu=mips64r2 -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N64-PIC %s
-# MIPS64EL-MIPS64R2-N64-PIC: Flags [ (0x80000006)
-
-# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -position-independent -mcpu=mips64r2 -target-abi n64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-N64-NAN2008-PIC %s
-# MIPS64EL-MIPS64R2-N64-NAN2008-PIC: Flags [ (0x80000406)
-
-# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -position-independent -mcpu=mips64 %s -target-abi n64 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N64-PIC %s
-# MIPS64EL-MIPS64-N64-PIC: Flags [ (0x60000006)
-
-# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -position-independent -mcpu=mips64 %s -target-abi n64 -mattr=+nan2008 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-N64-NAN2008-PIC %s
-# MIPS64EL-MIPS64-N64-NAN2008-PIC: Flags [ (0x60000406)
+# MIPS64EL-MIPS64-N64-NAN2008: Flags [ (0x60000406)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -target-abi o32 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-O32 %s
# MIPS64EL-MIPS64R2-O32: Flags [ (0x80001104)
@@ -111,40 +77,22 @@
# MIPS64EL-MIPS64R2-O32-NAN2008: Flags [ (0x80001504)
# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips5 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS5 %s
-# MIPS5: Flags [ (0x40000000)
+# MIPS5: Flags [ (0x40000006)
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips5 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS5-NAN2008 %s
-# MIPS5-NAN2008: Flags [ (0x40000400)
+ # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips5 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS5-NAN2008 %s
+# MIPS5-NAN2008: Flags [ (0x40000406)
# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips4 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS4 %s
-# MIPS4: Flags [ (0x30000000)
+# MIPS4: Flags [ (0x30000006)
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips4 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS4-NAN2008 %s
-# MIPS4-NAN2008: Flags [ (0x30000400)
+ # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips4 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS4-NAN2008 %s
+# MIPS4-NAN2008: Flags [ (0x30000406)
# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips3 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS3 %s
-# MIPS3: Flags [ (0x20000000)
+# MIPS3: Flags [ (0x20000006)
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips3 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS3-NAN2008 %s
-# MIPS3-NAN2008: Flags [ (0x20000400)
-
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -position-independent -mcpu=mips5 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS5-PIC %s
-# MIPS5-PIC: Flags [ (0x40000006)
-
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -position-independent -mcpu=mips5 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS5-NAN2008-PIC %s
-# MIPS5-NAN2008-PIC: Flags [ (0x40000406)
-
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -position-independent -mcpu=mips4 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS4-PIC %s
-# MIPS4-PIC: Flags [ (0x30000006)
-
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -position-independent -mcpu=mips4 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS4-NAN2008-PIC %s
-# MIPS4-NAN2008-PIC: Flags [ (0x30000406)
-
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -position-independent -mcpu=mips3 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS3-PIC %s
-# MIPS3-PIC: Flags [ (0x20000006)
-
-# RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -position-independent -mcpu=mips3 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS3-NAN2008-PIC %s
-# MIPS3-NAN2008-PIC: Flags [ (0x20000406)
+ # RUN: llvm-mc -filetype=obj -triple mips64-unknown-linux -mcpu=mips3 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS3-NAN2008 %s
+# MIPS3-NAN2008: Flags [ (0x20000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=mips2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-MIPS2 %s
# MIPSEL-MIPS2: Flags [ (0x10001004)
@@ -155,7 +103,7 @@
# RUN: llvm-mc -filetype=obj -triple mips-unknown-linux -mcpu=mips1 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS1 %s
# MIPS1: Flags [ (0x1004)
-# RUN: llvm-mc -filetype=obj -triple mips-unknown-linux -mcpu=mips1 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS1-NAN2008 %s
+ # RUN: llvm-mc -filetype=obj -triple mips-unknown-linux -mcpu=mips1 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS1-NAN2008 %s
# MIPS1-NAN2008: Flags [ (0x1404)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -target-abi o32 -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-O32 %s
@@ -166,31 +114,17 @@
# Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2 %s
-# MIPS64EL-MIPS64R2: Flags [ (0x80000000)
+# MIPS64EL-MIPS64R2: Flags [ (0x80000006)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64r2 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-NAN2008 %s
-# MIPS64EL-MIPS64R2-NAN2008: Flags [ (0x80000400)
+# MIPS64EL-MIPS64R2-NAN2008: Flags [ (0x80000406)
# Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64 %s
-# MIPS64EL-MIPS64: Flags [ (0x60000000)
+# MIPS64EL-MIPS64: Flags [ (0x60000006)
# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-NAN2008 %s
-# MIPS64EL-MIPS64-NAN2008: Flags [ (0x60000400)
-
-# Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32)
-# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -position-independent -mcpu=mips64r2 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-PIC %s
-# MIPS64EL-MIPS64R2-PIC: Flags [ (0x80000006)
-
-# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -position-independent -mcpu=mips64r2 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64R2-NAN2008-PIC %s
-# MIPS64EL-MIPS64R2-NAN2008-PIC: Flags [ (0x80000406)
-
-# Default ABI for MIPS64 is N64 as opposed to GCC/GAS (N32)
-# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -position-independent -mcpu=mips64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-PIC %s
-# MIPS64EL-MIPS64-PIC: Flags [ (0x60000006)
-
-# RUN: llvm-mc -filetype=obj -triple mips64el-unknown-linux -position-independent -mcpu=mips64 -mattr=+nan2008 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPS64EL-MIPS64-NAN2008-PIC %s
-# MIPS64EL-MIPS64-NAN2008-PIC: Flags [ (0x60000406)
+# MIPS64EL-MIPS64-NAN2008: Flags [ (0x60000406)
# RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux -mcpu=octeon -target-abi n64 %s -o -| llvm-readobj -h | FileCheck --check-prefix=MIPSEL-OCTEON %s
-# MIPSEL-OCTEON: Flags [ (0x808B0000)
+# MIPSEL-OCTEON: Flags [ (0x808B0006)