commit 5d088b00bf14601f3f44573e9665a9668ea74603
author Chris Lattner <sabre@nondot.org> Tue Mar 26 17:58:12 2002 +0000
committer Chris Lattner <sabre@nondot.org> Tue Mar 26 17:58:12 2002 +0000
tree fe2d204eaeb90ea872244a6df12dbd46561eba93
parent 0df67e347a361fd7ebf30503c5c348dcdff20423

Convert to use new style casts instead of direct checking

llvm-svn: 1990

llvm/lib/Target/Sparc/SparcInstrSelection.cpp

diff --git a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
index 2ecae9e..533c8cf 100644
--- a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
+++ b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp
@@ -2105,7 +2105,7 @@
         // the PC-relative address fits in the CALL address field (22 bits).
         // Use JMPL for indirect calls.
         // 
-        if (callee->getValueType() == Value::MethodVal)
+        if (isa<Function>(callee))
           { // direct function call
             M = new MachineInstr(CALL);
             M->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp,
@@ -2133,7 +2133,7 @@
           mvec.back()->addImplicitRef(callInstr, /*isDef*/ true);
         
         // For the CALL instruction, the ret. addr. reg. is also implicit
-        if (callee->getValueType() == Value::MethodVal)
+        if (isa<Function>(callee))
           mvec.back()->addImplicitRef(retAddrReg, /*isDef*/ true);
         
         // delay slot