Describe stack-id as an enum
This patch changes MIR stack-id from an integer to an enum,
and adds printing/parsing support for this in MIR files. The default
stack-id '0' is now renamed to 'default'.
This should make MIR tests that have stack objects with different stack-ids
more descriptive. It also clarifies code operating on StackID.
Reviewers: arsenm, thegameg, qcolombet
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D60137
llvm-svn: 363533
diff --git a/llvm/include/llvm/CodeGen/MIRYamlMapping.h b/llvm/include/llvm/CodeGen/MIRYamlMapping.h
index 13f572f..fb734ba 100644
--- a/llvm/include/llvm/CodeGen/MIRYamlMapping.h
+++ b/llvm/include/llvm/CodeGen/MIRYamlMapping.h
@@ -17,6 +17,7 @@
#include "llvm/ADT/Optional.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/CodeGen/MachineJumpTableInfo.h"
+#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/Support/SMLoc.h"
#include "llvm/Support/YAMLTraits.h"
#include "llvm/Support/raw_ostream.h"
@@ -212,7 +213,7 @@
int64_t Offset = 0;
uint64_t Size = 0;
unsigned Alignment = 0;
- uint8_t StackID = 0;
+ TargetStackID::Value StackID;
StringValue CalleeSavedRegister;
bool CalleeSavedRestored = true;
Optional<int64_t> LocalOffset;
@@ -252,7 +253,7 @@
if (Object.Type != MachineStackObject::VariableSized)
YamlIO.mapRequired("size", Object.Size);
YamlIO.mapOptional("alignment", Object.Alignment, (unsigned)0);
- YamlIO.mapOptional("stack-id", Object.StackID);
+ YamlIO.mapOptional("stack-id", Object.StackID, TargetStackID::Default);
YamlIO.mapOptional("callee-saved-register", Object.CalleeSavedRegister,
StringValue()); // Don't print it out when it's empty.
YamlIO.mapOptional("callee-saved-restored", Object.CalleeSavedRestored,
@@ -278,7 +279,7 @@
int64_t Offset = 0;
uint64_t Size = 0;
unsigned Alignment = 0;
- uint8_t StackID = 0;
+ TargetStackID::Value StackID;
bool IsImmutable = false;
bool IsAliased = false;
StringValue CalleeSavedRegister;
@@ -308,6 +309,15 @@
}
};
+template <>
+struct ScalarEnumerationTraits<TargetStackID::Value> {
+ static void enumeration(yaml::IO &IO, TargetStackID::Value &ID) {
+ IO.enumCase(ID, "default", TargetStackID::Default);
+ IO.enumCase(ID, "sgpr-spill", TargetStackID::SGPRSpill);
+ IO.enumCase(ID, "noalloc", TargetStackID::NoAlloc);
+ }
+};
+
template <> struct MappingTraits<FixedMachineStackObject> {
static void mapping(yaml::IO &YamlIO, FixedMachineStackObject &Object) {
YamlIO.mapRequired("id", Object.ID);
@@ -317,7 +327,7 @@
YamlIO.mapOptional("offset", Object.Offset, (int64_t)0);
YamlIO.mapOptional("size", Object.Size, (uint64_t)0);
YamlIO.mapOptional("alignment", Object.Alignment, (unsigned)0);
- YamlIO.mapOptional("stack-id", Object.StackID);
+ YamlIO.mapOptional("stack-id", Object.StackID, TargetStackID::Default);
if (Object.Type != FixedMachineStackObject::SpillSlot) {
YamlIO.mapOptional("isImmutable", Object.IsImmutable, false);
YamlIO.mapOptional("isAliased", Object.IsAliased, false);
diff --git a/llvm/include/llvm/CodeGen/TargetFrameLowering.h b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
index 754ee5c..878c9ff 100644
--- a/llvm/include/llvm/CodeGen/TargetFrameLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetFrameLowering.h
@@ -14,6 +14,7 @@
#define LLVM_CODEGEN_TARGETFRAMELOWERING_H
#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/ADT/StringSwitch.h"
#include <utility>
#include <vector>
@@ -23,6 +24,14 @@
class MachineFunction;
class RegScavenger;
+namespace TargetStackID {
+ enum Value {
+ Default = 0,
+ SGPRSpill = 1,
+ NoAlloc = 255
+ };
+}
+
/// Information about stack frame layout on the target. It holds the direction
/// of stack growth, the known stack alignment on entry to each function, and
/// the offset to the locals area.
@@ -345,6 +354,16 @@
return true;
}
+ virtual bool isSupportedStackID(TargetStackID::Value ID) const {
+ switch (ID) {
+ default:
+ return false;
+ case TargetStackID::Default:
+ case TargetStackID::NoAlloc:
+ return true;
+ }
+ }
+
/// Check if given function is safe for not having callee saved registers.
/// This is used when interprocedural register allocation is enabled.
static bool isSafeForNoCSROpt(const Function &F) {
diff --git a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
index 14cf47f..e1b43fe 100644
--- a/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
@@ -27,6 +27,7 @@
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/DebugInfo.h"
#include "llvm/IR/DiagnosticInfo.h"
@@ -579,6 +580,7 @@
const yaml::MachineFunction &YamlMF) {
MachineFunction &MF = PFS.MF;
MachineFrameInfo &MFI = MF.getFrameInfo();
+ const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
const Function &F = MF.getFunction();
const yaml::MachineFrameInfo &YamlMFI = YamlMF.FrameInfo;
MFI.setFrameAddressIsTaken(YamlMFI.IsFrameAddressTaken);
@@ -620,6 +622,10 @@
Object.IsImmutable, Object.IsAliased);
else
ObjectIdx = MFI.CreateFixedSpillStackObject(Object.Size, Object.Offset);
+
+ if (!TFI->isSupportedStackID(Object.StackID))
+ return error(Object.ID.SourceRange.Start,
+ Twine("StackID is not supported by target"));
MFI.setStackID(ObjectIdx, Object.StackID);
MFI.setObjectAlignment(ObjectIdx, Object.Alignment);
if (!PFS.FixedStackObjectSlots.insert(std::make_pair(Object.ID.Value,
@@ -649,6 +655,9 @@
"' isn't defined in the function '" + F.getName() +
"'");
}
+ if (!TFI->isSupportedStackID(Object.StackID))
+ return error(Object.ID.SourceRange.Start,
+ Twine("StackID is not supported by target"));
if (Object.Type == yaml::MachineStackObject::VariableSized)
ObjectIdx = MFI.CreateVariableSizedObject(Object.Alignment, Alloca);
else
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index e6f5890..f14ce57 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -35,6 +35,7 @@
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/CodeGen/TargetFrameLowering.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/Constants.h"
#include "llvm/IR/DebugInfo.h"
@@ -368,7 +369,7 @@
YamlObject.Offset = MFI.getObjectOffset(I);
YamlObject.Size = MFI.getObjectSize(I);
YamlObject.Alignment = MFI.getObjectAlignment(I);
- YamlObject.StackID = MFI.getStackID(I);
+ YamlObject.StackID = (TargetStackID::Value)MFI.getStackID(I);
YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
YMF.FixedStackObjects.push_back(YamlObject);
@@ -395,7 +396,7 @@
YamlObject.Offset = MFI.getObjectOffset(I);
YamlObject.Size = MFI.getObjectSize(I);
YamlObject.Alignment = MFI.getObjectAlignment(I);
- YamlObject.StackID = MFI.getStackID(I);
+ YamlObject.StackID = (TargetStackID::Value)MFI.getStackID(I);
YMF.StackObjects.push_back(YamlObject);
StackObjectOperandMapping.insert(std::make_pair(
diff --git a/llvm/lib/CodeGen/MachineFrameInfo.cpp b/llvm/lib/CodeGen/MachineFrameInfo.cpp
index e8a3dda..989a6a7 100644
--- a/llvm/lib/CodeGen/MachineFrameInfo.cpp
+++ b/llvm/lib/CodeGen/MachineFrameInfo.cpp
@@ -143,14 +143,14 @@
for (int i = getObjectIndexBegin(); i != 0; ++i) {
// Only estimate stack size of default stack.
- if (getStackID(i))
+ if (getStackID(i) != TargetStackID::Default)
continue;
int FixedOff = -getObjectOffset(i);
if (FixedOff > Offset) Offset = FixedOff;
}
for (unsigned i = 0, e = getObjectIndexEnd(); i != e; ++i) {
// Only estimate stack size of live objects on default stack.
- if (isDeadObjectIndex(i) || getStackID(i))
+ if (isDeadObjectIndex(i) || getStackID(i) != TargetStackID::Default)
continue;
Offset += getObjectSize(i);
unsigned Align = getObjectAlignment(i);
diff --git a/llvm/lib/CodeGen/PrologEpilogInserter.cpp b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
index ab6814b..9495567 100644
--- a/llvm/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/llvm/lib/CodeGen/PrologEpilogInserter.cpp
@@ -662,11 +662,11 @@
// Add fixed objects.
for (int i = MFI.getObjectIndexBegin(); i != 0; ++i)
// StackSlot scavenging is only implemented for the default stack.
- if (MFI.getStackID(i) == 0)
+ if (MFI.getStackID(i) == TargetStackID::Default)
AllocatedFrameSlots.push_back(i);
// Add callee-save objects.
for (int i = MinCSFrameIndex; i <= (int)MaxCSFrameIndex; ++i)
- if (MFI.getStackID(i) == 0)
+ if (MFI.getStackID(i) == TargetStackID::Default)
AllocatedFrameSlots.push_back(i);
for (int i : AllocatedFrameSlots) {
@@ -791,7 +791,8 @@
#ifdef EXPENSIVE_CHECKS
for (unsigned i = 0, e = MFI.getObjectIndexEnd(); i != e; ++i)
- if (!MFI.isDeadObjectIndex(i) && MFI.getStackID(i) == 0)
+ if (!MFI.isDeadObjectIndex(i) &&
+ MFI.getStackID(i) == TargetStackID::Default)
assert(MFI.getObjectAlignment(i) <= MFI.getMaxAlignment() &&
"MaxAlignment is invalid");
#endif
@@ -801,7 +802,8 @@
// Adjust 'Offset' to point to the end of last fixed sized preallocated
// object.
for (int i = MFI.getObjectIndexBegin(); i != 0; ++i) {
- if (MFI.getStackID(i)) // Only allocate objects on the default stack.
+ if (MFI.getStackID(i) !=
+ TargetStackID::Default) // Only allocate objects on the default stack.
continue;
int64_t FixedOff;
@@ -822,7 +824,8 @@
// callee saved registers.
if (StackGrowsDown) {
for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
- if (MFI.getStackID(i)) // Only allocate objects on the default stack.
+ if (MFI.getStackID(i) !=
+ TargetStackID::Default) // Only allocate objects on the default stack.
continue;
// If the stack grows down, we need to add the size to find the lowest
@@ -839,7 +842,8 @@
} else if (MaxCSFrameIndex >= MinCSFrameIndex) {
// Be careful about underflow in comparisons agains MinCSFrameIndex.
for (unsigned i = MaxCSFrameIndex; i != MinCSFrameIndex - 1; --i) {
- if (MFI.getStackID(i)) // Only allocate objects on the default stack.
+ if (MFI.getStackID(i) !=
+ TargetStackID::Default) // Only allocate objects on the default stack.
continue;
if (MFI.isDeadObjectIndex(i))
@@ -932,7 +936,8 @@
if (MFI.getStackProtectorIndex() == (int)i ||
EHRegNodeFrameIndex == (int)i)
continue;
- if (MFI.getStackID(i)) // Only allocate objects on the default stack.
+ if (MFI.getStackID(i) !=
+ TargetStackID::Default) // Only allocate objects on the default stack.
continue;
switch (MFI.getObjectSSPLayout(i)) {
@@ -977,7 +982,8 @@
continue;
if (ProtectedObjs.count(i))
continue;
- if (MFI.getStackID(i)) // Only allocate objects on the default stack.
+ if (MFI.getStackID(i) !=
+ TargetStackID::Default) // Only allocate objects on the default stack.
continue;
// Add the objects that we need to allocate to our working set.
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index f57376c..c21f88f 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -155,13 +155,6 @@
};
}
-namespace SIStackID {
-enum StackTypes : uint8_t {
- SCRATCH = 0,
- SGPR_SPILL = 1
-};
-}
-
// Input operand modifiers bit-masks
// NEG and SEXT share same bit-mask because they can't be set simultaneously.
namespace SISrcMods {
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index 9571048..f6dadb7 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -544,6 +544,17 @@
return AMDGPU::NoRegister;
}
+bool SIFrameLowering::isSupportedStackID(TargetStackID::Value ID) const {
+ switch (ID) {
+ default:
+ return false;
+ case TargetStackID::Default:
+ case TargetStackID::NoAlloc:
+ case TargetStackID::SGPRSpill:
+ return true;
+ }
+}
+
void SIFrameLowering::emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
@@ -762,7 +773,7 @@
if (TII->isSGPRSpill(MI)) {
int FI = TII->getNamedOperand(MI, AMDGPU::OpName::addr)->getIndex();
- assert(MFI.getStackID(FI) == SIStackID::SGPR_SPILL);
+ assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill);
if (FuncInfo->allocateSGPRSpillToVGPR(MF, FI)) {
bool Spilled = TRI.eliminateSGPRToVGPRSpillFrameIndex(MI, FI, RS);
(void)Spilled;
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.h b/llvm/lib/Target/AMDGPU/SIFrameLowering.h
index a9e765a..60fab66 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.h
@@ -37,6 +37,8 @@
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
RegScavenger *RS = nullptr) const override;
+ bool isSupportedStackID(TargetStackID::Value ID) const override;
+
void processFunctionBeforeFrameFinalized(
MachineFunction &MF,
RegScavenger *RS = nullptr) const override;
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 078c08a..58f4d95 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -958,7 +958,7 @@
// needing them, and need to ensure that the reserved registers are
// correctly handled.
- FrameInfo.setStackID(FrameIndex, SIStackID::SGPR_SPILL);
+ FrameInfo.setStackID(FrameIndex, TargetStackID::SGPRSpill);
if (ST.hasScalarStores()) {
// m0 is used for offset to scalar stores if used to spill.
Spill.addReg(AMDGPU::M0, RegState::ImplicitDefine | RegState::Dead);
@@ -1052,7 +1052,7 @@
MRI.constrainRegClass(DestReg, &AMDGPU::SReg_32_XM0RegClass);
}
- FrameInfo.setStackID(FrameIndex, SIStackID::SGPR_SPILL);
+ FrameInfo.setStackID(FrameIndex, TargetStackID::SGPRSpill);
MachineInstrBuilder Spill = BuildMI(MBB, MI, DL, OpDesc, DestReg)
.addFrameIndex(FrameIndex) // addr
.addMemOperand(MMO)
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
index 3758df2..81f29b8 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
@@ -33,13 +33,13 @@
; CHECK-LABEL: name: allocai64
; CHECK: stack:
; CHECK-NEXT: - { id: 0, name: ptr1, type: default, offset: 0, size: 8, alignment: 8,
-; CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+; CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
; CHECK-NEXT: - { id: 1, name: ptr2, type: default, offset: 0, size: 8, alignment: 1,
-; CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+; CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
; CHECK-NEXT: - { id: 2, name: ptr3, type: default, offset: 0, size: 128, alignment: 8,
-; CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+; CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
; CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
; CHECK-NEXT: - { id: 3, name: ptr4, type: default, offset: 0, size: 1, alignment: 8,
; CHECK: %{{[0-9]+}}:_(p0) = G_FRAME_INDEX %stack.0.ptr1
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
index d165a11..ab4b68d 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
@@ -941,7 +941,7 @@
frameInfo:
maxAlignment: 2
stack:
- - { id: 0, name: p.addr, size: 2, alignment: 2, stack-id: 0 }
+ - { id: 0, name: p.addr, size: 2, alignment: 2, stack-id: default }
body: |
bb.1.entry:
liveins: $h0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
index bde62d5..8cea80c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
@@ -236,7 +236,7 @@
; CHECK-LABEL: name: test_mem_i1
; CHECK: fixedStack:
-; CHECK-NEXT: - { id: [[SLOT:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, stack-id: 0,
+; CHECK-NEXT: - { id: [[SLOT:[0-9]+]], type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
; CHECK-NEXT: isImmutable: true,
; CHECK: [[ADDR:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.[[SLOT]]
; CHECK: {{%[0-9]+}}:_(s1) = G_LOAD [[ADDR]](p0) :: (invariant load 1 from %fixed-stack.[[SLOT]])
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir b/llvm/test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir
index c2ed472..304f42c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir
@@ -24,7 +24,7 @@
fixedStack:
stack:
- { id: 0, name: a.addr, type: default, offset: 0, size: 16, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
body: |
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
index ba4fdb5..d8f5f5d 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
@@ -23,7 +23,7 @@
regBankSelected: true
stack:
- { id: 0, name: retval, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-tiny.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-tiny.mir
index a80467c..8440ceb 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-tiny.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-tiny.mir
@@ -23,7 +23,7 @@
regBankSelected: true
stack:
- { id: 0, name: retval, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.mir b/llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.mir
index b151d06..b90bf63 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.mir
+++ b/llvm/test/CodeGen/AArch64/aarch64-mov-debug-locs.mir
@@ -162,22 +162,22 @@
fixedStack: []
stack:
- { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$fp', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$fp', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x19', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x20', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x21', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x22', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants: []
machineFunctionInfo: {}
diff --git a/llvm/test/CodeGen/AArch64/branch-target-enforcment.mir b/llvm/test/CodeGen/AArch64/branch-target-enforcment.mir
index 2cc6354..5db503d 100644
--- a/llvm/test/CodeGen/AArch64/branch-target-enforcment.mir
+++ b/llvm/test/CodeGen/AArch64/branch-target-enforcment.mir
@@ -126,7 +126,7 @@
name: ptr_auth
stack:
- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
bb.0.entry:
@@ -150,7 +150,7 @@
name: ptr_auth_b
stack:
- { id: 0, name: '', type: spill-slot, offset: -16, size: 8, alignment: 16,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
bb.0.entry:
diff --git a/llvm/test/CodeGen/AArch64/cfi_restore.mir b/llvm/test/CodeGen/AArch64/cfi_restore.mir
index 6d93411..dc244e9 100644
--- a/llvm/test/CodeGen/AArch64/cfi_restore.mir
+++ b/llvm/test/CodeGen/AArch64/cfi_restore.mir
@@ -8,9 +8,9 @@
maxAlignment: 8
hasCalls: true
stack:
- - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$lr' }
- - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$fp' }
body: |
bb.0:
diff --git a/llvm/test/CodeGen/AArch64/dont-shrink-wrap-stack-mayloadorstore.mir b/llvm/test/CodeGen/AArch64/dont-shrink-wrap-stack-mayloadorstore.mir
index 5cd1c20..3a35388 100644
--- a/llvm/test/CodeGen/AArch64/dont-shrink-wrap-stack-mayloadorstore.mir
+++ b/llvm/test/CodeGen/AArch64/dont-shrink-wrap-stack-mayloadorstore.mir
@@ -125,7 +125,7 @@
maxCallFrameSize: 0
localFrameSize: 64
stack:
- - { id: 0, name: rstack, size: 64, alignment: 4, stack-id: 0, local-offset: -64 }
+ - { id: 0, name: rstack, size: 64, alignment: 4, stack-id: default, local-offset: -64 }
machineFunctionInfo: {}
body: |
bb.0.entry:
@@ -184,7 +184,7 @@
maxCallFrameSize: 0
localFrameSize: 4
stack:
- - { id: 0, name: tmp, size: 4, alignment: 4, stack-id: 0, local-offset: -4 }
+ - { id: 0, name: tmp, size: 4, alignment: 4, stack-id: default, local-offset: -4 }
machineFunctionInfo: {}
body: |
bb.0.bb:
diff --git a/llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir b/llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
index 2b168b3..f080d7d 100644
--- a/llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
+++ b/llvm/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
@@ -47,7 +47,7 @@
tracksRegLiveness: true
stack:
- { id : 0, size: 8, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
diff --git a/llvm/test/CodeGen/AArch64/spill-stack-realignment.mir b/llvm/test/CodeGen/AArch64/spill-stack-realignment.mir
index a6837bc..b65318a 100644
--- a/llvm/test/CodeGen/AArch64/spill-stack-realignment.mir
+++ b/llvm/test/CodeGen/AArch64/spill-stack-realignment.mir
@@ -11,10 +11,10 @@
maxAlignment: 64
# CHECK: stack:
# CHECK: id: 0, name: '', type: default, offset: -64, size: 4, alignment: 64
-# CHECK-NEXT: stack-id: 0
+# CHECK-NEXT: stack-id: default
# CHECK-NEXT: local-offset: -64
# CHECK: id: 1, name: '', type: default, offset: -20, size: 4, alignment: 4
-# CHECK-NEXT: stack-id: 0
+# CHECK-NEXT: stack-id: default
# CHECK-NEXT: local-offset: -68
stack:
- { id: 0, size: 4, alignment: 64, local-offset: -64 }
diff --git a/llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir b/llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir
index 3815240..56a3d280 100644
--- a/llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir
+++ b/llvm/test/CodeGen/AArch64/stack-id-pei-alloc.mir
@@ -7,18 +7,18 @@
# CHECK: stackSize: 16
# CHECK: stack:
# CHECK: id: 0, name: '', type: default, offset: -8, size: 8, alignment: 8,
-# CHECK-NEXT: stack-id: 0
+# CHECK-NEXT: stack-id: default
# CHECK: id: 1, name: '', type: default, offset: -16, size: 8, alignment: 8,
-# CHECK-NEXT: stack-id: 0
+# CHECK-NEXT: stack-id: default
# CHECK: id: 2, name: '', type: default, offset: 0, size: 8, alignment: 8,
-# CHECK-NEXT: stack-id: 42
+# CHECK-NEXT: stack-id: noalloc
name: test_allocate
frameInfo:
maxAlignment: 16
stack:
- - { id: 0, stack-id: 0, size: 8, alignment: 8, offset: 0 }
- - { id: 1, stack-id: 0, size: 8, alignment: 8, offset: 0 }
- - { id: 2, stack-id: 42, size: 8, alignment: 8, offset: 0 }
+ - { id: 0, stack-id: default, size: 8, alignment: 8, offset: 0 }
+ - { id: 1, stack-id: default, size: 8, alignment: 8, offset: 0 }
+ - { id: 2, stack-id: noalloc, size: 8, alignment: 8, offset: 0 }
body: |
bb.0.entry:
RET_ReallyLR
@@ -35,8 +35,8 @@
frameInfo:
maxAlignment: 16
stack:
- - { id: 0, stack-id: 0, size: 16, alignment: 32 }
- - { id: 1, stack-id: 42, size: 16, alignment: 64 }
+ - { id: 0, stack-id: default, size: 16, alignment: 32 }
+ - { id: 1, stack-id: noalloc, size: 16, alignment: 64 }
body: |
bb.0.entry:
RET_ReallyLR
@@ -48,8 +48,8 @@
frameInfo:
maxAlignment: 16
fixedStack:
- - { id: 0, stack-id: 0, size: 16, alignment: 32 }
- - { id: 1, stack-id: 42, size: 16, alignment: 64 }
+ - { id: 0, stack-id: default, size: 16, alignment: 32 }
+ - { id: 1, stack-id: noalloc, size: 16, alignment: 64 }
body: |
bb.0.entry:
RET_ReallyLR
diff --git a/llvm/test/CodeGen/AArch64/stack-id-stackslot-scavenging.mir b/llvm/test/CodeGen/AArch64/stack-id-stackslot-scavenging.mir
index 029b0eb..69b9ce9 100644
--- a/llvm/test/CodeGen/AArch64/stack-id-stackslot-scavenging.mir
+++ b/llvm/test/CodeGen/AArch64/stack-id-stackslot-scavenging.mir
@@ -13,7 +13,7 @@
frameInfo:
maxAlignment: 16
stack:
- - { id: 0, stack-id: 42, size: 8, alignment: 8 }
+ - { id: 0, stack-id: noalloc, size: 8, alignment: 8 }
body: |
bb.0.entry:
liveins: $x0
diff --git a/llvm/test/CodeGen/AArch64/wineh-frame5.mir b/llvm/test/CodeGen/AArch64/wineh-frame5.mir
index 2a4eed4..64e9c2f 100644
--- a/llvm/test/CodeGen/AArch64/wineh-frame5.mir
+++ b/llvm/test/CodeGen/AArch64/wineh-frame5.mir
@@ -105,7 +105,7 @@
fixedStack:
stack:
- { id: 0, name: B, type: default, offset: 0, size: 492, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -492, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/AArch64/wineh-frame6.mir b/llvm/test/CodeGen/AArch64/wineh-frame6.mir
index b86422e..e61e016 100644
--- a/llvm/test/CodeGen/AArch64/wineh-frame6.mir
+++ b/llvm/test/CodeGen/AArch64/wineh-frame6.mir
@@ -91,31 +91,31 @@
fixedStack:
stack:
- { id: 0, name: c.addr, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: b.addr, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -8, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, name: idx.addr, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -12, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 3, name: n.addr, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -16, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 4, name: a, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -24, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 5, name: '', type: variable-sized, offset: 0,
- alignment: 1, stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ alignment: 1, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -24, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh-frame7.mir b/llvm/test/CodeGen/AArch64/wineh-frame7.mir
index 3e3e79e..c5d0920 100644
--- a/llvm/test/CodeGen/AArch64/wineh-frame7.mir
+++ b/llvm/test/CodeGen/AArch64/wineh-frame7.mir
@@ -110,30 +110,30 @@
fixedStack:
stack:
- { id: 0, name: retval, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: i.addr, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -8, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, name: A, type: default, offset: 0, size: 2992772, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -2992780, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 3, name: a, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -2992784, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 4, name: B, type: default, offset: 0, size: 492, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -2993276, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh-frame8.mir b/llvm/test/CodeGen/AArch64/wineh-frame8.mir
index 6fc7416..3d50fcf 100644
--- a/llvm/test/CodeGen/AArch64/wineh-frame8.mir
+++ b/llvm/test/CodeGen/AArch64/wineh-frame8.mir
@@ -65,11 +65,11 @@
fixedStack:
stack:
- { id: 0, name: a.addr, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: b, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -8, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/AArch64/wineh1.mir b/llvm/test/CodeGen/AArch64/wineh1.mir
index 593b98a..b01d4cb 100644
--- a/llvm/test/CodeGen/AArch64/wineh1.mir
+++ b/llvm/test/CodeGen/AArch64/wineh1.mir
@@ -53,25 +53,25 @@
maxCallFrameSize: 0
hasOpaqueSPAdjustment: true
stack:
- - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x19' }
- - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x20' }
- - { id: 2, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0,
+ - { id: 2, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x21' }
- - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 8, stack-id: 0,
+ - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x22' }
- - { id: 4, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: 0,
+ - { id: 4, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x23' }
- - { id: 5, type: spill-slot, offset: -48, size: 8, alignment: 8, stack-id: 0,
+ - { id: 5, type: spill-slot, offset: -48, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x24' }
- - { id: 6, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: 0,
+ - { id: 6, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x25' }
- - { id: 7, type: spill-slot, offset: -64, size: 8, alignment: 8, stack-id: 0,
+ - { id: 7, type: spill-slot, offset: -64, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x26' }
- - { id: 8, type: spill-slot, offset: -72, size: 8, alignment: 8, stack-id: 0,
+ - { id: 8, type: spill-slot, offset: -72, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x27' }
- - { id: 9, type: spill-slot, offset: -80, size: 8, alignment: 8, stack-id: 0,
+ - { id: 9, type: spill-slot, offset: -80, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x28' }
body: |
bb.0.entry:
diff --git a/llvm/test/CodeGen/AArch64/wineh2.mir b/llvm/test/CodeGen/AArch64/wineh2.mir
index c8d9a01..9352181 100644
--- a/llvm/test/CodeGen/AArch64/wineh2.mir
+++ b/llvm/test/CodeGen/AArch64/wineh2.mir
@@ -75,49 +75,49 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x19', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x20', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x21', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x22', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x23', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x23', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x24', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x24', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: -56, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x25', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x25', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 7, name: '', type: spill-slot, offset: -64, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x26', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x26', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 8, name: '', type: spill-slot, offset: -72, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x27', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x27', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 9, name: '', type: spill-slot, offset: -80, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x28', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x28', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 10, name: '', type: spill-slot, offset: -88, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d8', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d8', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 11, name: '', type: spill-slot, offset: -96, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d9', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d9', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 12, name: '', type: spill-slot, offset: -104, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d10', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d10', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 13, name: '', type: spill-slot, offset: -112, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d11', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d11', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 14, name: '', type: spill-slot, offset: -128, size: 8, alignment: 16,
- stack-id: 0, callee-saved-register: '$d12', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d12', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh3.mir b/llvm/test/CodeGen/AArch64/wineh3.mir
index 395f8da..f2aea13 100644
--- a/llvm/test/CodeGen/AArch64/wineh3.mir
+++ b/llvm/test/CodeGen/AArch64/wineh3.mir
@@ -73,46 +73,46 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x19', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x20', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x21', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x22', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x23', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x23', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x24', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x24', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: -56, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x25', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x25', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 7, name: '', type: spill-slot, offset: -64, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x26', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x26', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 8, name: '', type: spill-slot, offset: -72, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x27', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x27', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 9, name: '', type: spill-slot, offset: -80, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x28', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x28', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 10, name: '', type: spill-slot, offset: -88, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d8', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d8', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 11, name: '', type: spill-slot, offset: -96, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d9', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d9', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 12, name: '', type: spill-slot, offset: -104, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d10', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d10', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 13, name: '', type: spill-slot, offset: -112, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d11', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d11', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh4.mir b/llvm/test/CodeGen/AArch64/wineh4.mir
index 424e220..6f03a38 100644
--- a/llvm/test/CodeGen/AArch64/wineh4.mir
+++ b/llvm/test/CodeGen/AArch64/wineh4.mir
@@ -86,46 +86,46 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x19', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x20', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x21', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x22', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x23', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x23', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x24', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x24', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: -56, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x25', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x25', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 7, name: '', type: spill-slot, offset: -64, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x26', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x26', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 8, name: '', type: spill-slot, offset: -72, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x27', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x27', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 9, name: '', type: spill-slot, offset: -80, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x28', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x28', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 10, name: '', type: spill-slot, offset: -88, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d8', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d8', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 11, name: '', type: spill-slot, offset: -96, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d9', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d9', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 12, name: '', type: spill-slot, offset: -104, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d10', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d10', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 13, name: '', type: spill-slot, offset: -112, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d11', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d11', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh5.mir b/llvm/test/CodeGen/AArch64/wineh5.mir
index 3736377..56b8d47 100644
--- a/llvm/test/CodeGen/AArch64/wineh5.mir
+++ b/llvm/test/CodeGen/AArch64/wineh5.mir
@@ -120,39 +120,39 @@
fixedStack:
stack:
- { id: 0, name: retval, type: default, offset: -36, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: i.addr, type: default, offset: -40, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -8, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, name: A, type: default, offset: -2992812, size: 2992772, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -2992780, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 3, name: a, type: default, offset: -2992816, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -2992784, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 4, name: B, type: default, offset: -2993308, size: 492, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -2993276, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: -2993320, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: -2993324, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 7, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$fp', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$fp', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 8, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 9, name: '', type: spill-slot, offset: -32, size: 8, alignment: 16,
- stack-id: 0, callee-saved-register: '$x28', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x28', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh6.mir b/llvm/test/CodeGen/AArch64/wineh6.mir
index c14c75f..12711eb 100644
--- a/llvm/test/CodeGen/AArch64/wineh6.mir
+++ b/llvm/test/CodeGen/AArch64/wineh6.mir
@@ -65,37 +65,37 @@
fixedStack:
stack:
- { id: 0, name: '', type: default, offset: -20, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: '', type: default, offset: -24, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -8, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, name: '', type: default, offset: -28, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -12, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 3, name: '', type: default, offset: -32, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -16, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 4, name: '', type: default, offset: -40, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -24, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 5, name: '', type: variable-sized, offset: -40,
- alignment: 1, stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ alignment: 1, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -24, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 7, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$fp', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$fp', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 8, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh7.mir b/llvm/test/CodeGen/AArch64/wineh7.mir
index c82dd7d..2d1b19a 100644
--- a/llvm/test/CodeGen/AArch64/wineh7.mir
+++ b/llvm/test/CodeGen/AArch64/wineh7.mir
@@ -70,26 +70,26 @@
fixedStack:
stack:
- { id: 0, name: '', type: variable-sized, offset: -48,
- alignment: 1, stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ alignment: 1, stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: 0, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$fp', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$fp', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x19', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 4, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x20', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x21', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x22', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh8.mir b/llvm/test/CodeGen/AArch64/wineh8.mir
index be1c6d2..018412a 100644
--- a/llvm/test/CodeGen/AArch64/wineh8.mir
+++ b/llvm/test/CodeGen/AArch64/wineh8.mir
@@ -85,46 +85,46 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x19', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x19', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x20', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x20', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x21', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x21', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x22', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x22', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 4, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x23', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x23', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x24', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x24', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: -56, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x25', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x25', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 7, name: '', type: spill-slot, offset: -64, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x26', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x26', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 8, name: '', type: spill-slot, offset: -72, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x27', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x27', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 9, name: '', type: spill-slot, offset: -80, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$x28', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$x28', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 10, name: '', type: spill-slot, offset: -88, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d8', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d8', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 11, name: '', type: spill-slot, offset: -96, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d9', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d9', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 12, name: '', type: spill-slot, offset: -104, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d10', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d10', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 13, name: '', type: spill-slot, offset: -112, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d11', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d11', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir b/llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir
index 9720472..418e19f 100644
--- a/llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir
+++ b/llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir
@@ -107,7 +107,7 @@
fixedStack:
stack:
- { id: 0, name: A, type: default, offset: 0, size: 4000, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4000, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
index 2f2a6d3..65775e3 100644
--- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
@@ -93,15 +93,15 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: default,
isImmutable: false, isAliased: false, callee-saved-register: '' }
stack:
- { id: 0, name: scratch0, type: default, offset: 4, size: 32768, alignment: 4,
- stack-id: 0, callee-saved-register: '', local-offset: 0,
+ stack-id: default, callee-saved-register: '', local-offset: 0,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: scratch1, type: default, offset: 32772, size: 32768,
- alignment: 4, stack-id: 0, callee-saved-register: '', local-offset: 32768,
+ alignment: 4, stack-id: default, callee-saved-register: '', local-offset: 32768,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
index e77c8e2..97f7f74 100644
--- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
+++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
@@ -73,15 +73,15 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: default,
isImmutable: false, isAliased: false, callee-saved-register: '' }
stack:
- { id: 0, name: scratch0, type: default, offset: 4, size: 32768, alignment: 4,
- stack-id: 0, callee-saved-register: '', local-offset: 0,
+ stack-id: default, callee-saved-register: '', local-offset: 0,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: scratch1, type: default, offset: 32772, size: 32768,
- alignment: 4, stack-id: 0, callee-saved-register: '', local-offset: 32768,
+ alignment: 4, stack-id: default, callee-saved-register: '', local-offset: 32768,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir b/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
index d461df5..95dcf8f 100644
--- a/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
+++ b/llvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
@@ -187,7 +187,7 @@
fixedStack:
stack:
- { id: 0, name: tmp5, type: default, offset: 0, size: 128, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: 0, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
index f69c324..7db6282 100644
--- a/llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
+++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill-wrong-stack-id.mir
@@ -24,13 +24,13 @@
# GCN-LABEL: name: sgpr_spill_wrong_stack_id
# SHARE: stack:
# SHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
-# SHARE: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+# SHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# SHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
-# SHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
+# SHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# SHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
-# SHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
+# SHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# SHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr32 :: (store 4 into %stack.2, addrspace 5)
@@ -46,16 +46,16 @@
# NOSHARE: stack:
# NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
-# NOSHARE: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+# NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
-# NOSHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
+# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
-# NOSHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
+# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# NOSHARE: - { id: 3, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
-# NOSHARE: stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
+# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# NOSHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr32 :: (store 4 into %stack.2, addrspace 5)
diff --git a/llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir b/llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
index 11cf52b..c051b61 100644
--- a/llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
+++ b/llvm/test/CodeGen/AMDGPU/stack-slot-color-sgpr-vgpr-spills.mir
@@ -4,10 +4,10 @@
# CHECK-LABEL: name: no_merge_sgpr_vgpr_spill_slot{{$}}
# CHECK: stack:
# CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
-# CHECK-NEXT: stack-id: 0,
+# CHECK-NEXT: stack-id: default,
# CHECK: - { id: 1, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
-# CHECK-NEXT: stack-id: 1,
+# CHECK-NEXT: stack-id: sgpr-spill,
# CHECK: SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, implicit $exec :: (store 4 into %stack.0, addrspace 5)
# CHECK: $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, implicit $exec :: (load 4 from %stack.0, addrspace 5)
diff --git a/llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir b/llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
index 6be843a..3c1e565 100644
--- a/llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
+++ b/llvm/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
@@ -34,7 +34,7 @@
- { reg: '$sgpr4_sgpr5', virtual-reg: '' }
stack:
- { id: 0, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
- stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
@@ -98,7 +98,7 @@
- { reg: '$sgpr4_sgpr5', virtual-reg: '' }
stack:
- { id: 0, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,
- stack-id: 1, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/ARM/constant-island-movwt.mir b/llvm/test/CodeGen/ARM/constant-island-movwt.mir
index 6f955af..f45013a 100644
--- a/llvm/test/CodeGen/ARM/constant-island-movwt.mir
+++ b/llvm/test/CodeGen/ARM/constant-island-movwt.mir
@@ -346,34 +346,34 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: false,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r11', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r7', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r6', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 4, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r5', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 5, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r4', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d11', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d11', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 7, name: '', type: spill-slot, offset: -40, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d10', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d10', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 8, name: '', type: spill-slot, offset: -48, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d9', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d9', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 9, name: '', type: spill-slot, offset: -56, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d8', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d8', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
- id: 0
diff --git a/llvm/test/CodeGen/ARM/fp16-litpool-arm.mir b/llvm/test/CodeGen/ARM/fp16-litpool-arm.mir
index 696b0fa..218e22b 100644
--- a/llvm/test/CodeGen/ARM/fp16-litpool-arm.mir
+++ b/llvm/test/CodeGen/ARM/fp16-litpool-arm.mir
@@ -42,7 +42,7 @@
maxAlignment: 2
maxCallFrameSize: 0
stack:
- - { id: 0, name: S, offset: -2, size: 2, alignment: 2, stack-id: 0, local-offset: -2 }
+ - { id: 0, name: S, offset: -2, size: 2, alignment: 2, stack-id: default, local-offset: -2 }
constants:
- id: 0
value: i32 1576323506
diff --git a/llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir b/llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir
index a8a562d..46e308f 100644
--- a/llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir
+++ b/llvm/test/CodeGen/ARM/fp16-litpool-thumb.mir
@@ -42,8 +42,8 @@
maxAlignment: 4
maxCallFrameSize: 0
stack:
- - { id: 0, name: F, offset: -4, size: 4, alignment: 4, stack-id: 0, local-offset: -4 }
- - { id: 1, name: S, offset: -6, size: 2, alignment: 2, stack-id: 0, local-offset: -6 }
+ - { id: 0, name: F, offset: -4, size: 4, alignment: 4, stack-id: default, local-offset: -4 }
+ - { id: 1, name: S, offset: -6, size: 2, alignment: 2, stack-id: default, local-offset: -6 }
constants:
- id: 0
value: i32 1109917696
diff --git a/llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir b/llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir
index 86738a5..65dae64 100644
--- a/llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir
+++ b/llvm/test/CodeGen/ARM/fp16-litpool2-arm.mir
@@ -66,7 +66,7 @@
fixedStack:
stack:
- { id: 0, name: res, type: default, offset: -2, size: 2, alignment: 2,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -2, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir b/llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir
index 049a06d..d5682f5 100644
--- a/llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir
+++ b/llvm/test/CodeGen/ARM/fp16-litpool3-arm.mir
@@ -67,7 +67,7 @@
fixedStack:
stack:
- { id: 0, name: res, type: default, offset: -2, size: 2, alignment: 2,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -2, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/ARM/register-scavenger-exceptions.mir b/llvm/test/CodeGen/ARM/register-scavenger-exceptions.mir
index 58f6cd7..d628c71 100644
--- a/llvm/test/CodeGen/ARM/register-scavenger-exceptions.mir
+++ b/llvm/test/CodeGen/ARM/register-scavenger-exceptions.mir
@@ -23,15 +23,15 @@
name: _Z3foov
stack:
- { id: 0, name: V1, type: default, offset: 0, size: 5000, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4080, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: tmp3, type: variable-sized, offset: 0, alignment: 1,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4112, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
bb.0.entry:
diff --git a/llvm/test/CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir b/llvm/test/CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir
index 8ab40c7..b10a9eb 100644
--- a/llvm/test/CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir
@@ -5,31 +5,31 @@
name: Proc8
stack:
- { id: 0, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -16, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -24, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 3, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -32, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 4, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -40, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 5, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -48, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 6, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -56, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir b/llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
index bcbefb0..2d4c9f5 100644
--- a/llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
@@ -11,31 +11,31 @@
name: Proc8
stack:
- { id: 0, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -16, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -24, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 3, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -32, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 4, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -40, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 5, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -48, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 6, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -56, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
index 639bb66..ac5f54b 100644
--- a/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
@@ -26,7 +26,7 @@
# CHECK-LABEL: stack_local
# CHECK: stack:
# CHECK: - { id: 0, name: local_var, type: default, offset: 0, size: 8, alignment: 8,
-# CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+# CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
# CHECK-NEXT: local-offset: -8, debug-info-variable: '', debug-info-expression: '',
# CHECK-NEXT: debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir b/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir
index acceda3..1879489 100644
--- a/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir
+++ b/llvm/test/CodeGen/MIR/AMDGPU/stack-id.mir
@@ -4,29 +4,29 @@
# CHECK-LABEL: name: spill_slot_stack_id
# CHECK: {{^}}fixedStack:
-# CHECK: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: 0,
-# CHECK: - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0,
-# CHECK: - { id: 2, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 9,
+# CHECK: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: default,
+# CHECK: - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: default,
+# CHECK: - { id: 2, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: noalloc,
# CHECK: {{^}}stack:
# CHECK: - { id: 0, name: '', type: spill-slot, offset: 0, size: 16,
-# CHECK-NEXT: stack-id: 3,
+# CHECK-NEXT: stack-id: noalloc,
# CHECK: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8,
-# CHECK-NEXT: stack-id: 0,
+# CHECK-NEXT: stack-id: default,
# CHECK: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4,
-# CHECK-NEXT: stack-id: 0,
+# CHECK-NEXT: stack-id: default,
name: spill_slot_stack_id
fixedStack:
- - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 9 }
- - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0 }
+ - { id: 0, type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: noalloc }
+ - { id: 1, type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: default }
- { id: 2, type: spill-slot, offset: 0, size: 4, alignment: 4 }
stack:
- - { id: 0, name: '', type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: 3 }
- - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: 0 }
+ - { id: 0, name: '', type: spill-slot, offset: 0, size: 16, alignment: 4, stack-id: noalloc }
+ - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4, stack-id: default }
- { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4 }
body: |
diff --git a/llvm/test/CodeGen/MIR/X86/branch-folder-with-label.mir b/llvm/test/CodeGen/MIR/X86/branch-folder-with-label.mir
index 9225684..0552c58 100644
--- a/llvm/test/CodeGen/MIR/X86/branch-folder-with-label.mir
+++ b/llvm/test/CodeGen/MIR/X86/branch-folder-with-label.mir
@@ -218,7 +218,7 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$rbx', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
stack:
@@ -292,15 +292,15 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$rbx', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$r14', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
stack:
- { id: 0, name: idx, type: default, offset: -28, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir b/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
index 65652ba..a12fdea 100644
--- a/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
+++ b/llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
@@ -177,11 +177,11 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: default,
callee-saved-register: '$esi' }
- - { id: 1, type: default, offset: 4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 1, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '' }
- - { id: 2, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0,
+ - { id: 2, type: default, offset: 0, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '' }
stack:
constants:
@@ -235,9 +235,9 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '' }
stack:
constants:
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir
index 209ed3e..c834ba0 100644
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-di.mir
@@ -34,7 +34,7 @@
frameInfo:
maxAlignment: 8
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, debug-info-variable: '!3', debug-info-expression: '!DIExpression()',
+ - { id: 0, size: 4, alignment: 16, stack-id: default, debug-info-variable: '!3', debug-info-expression: '!DIExpression()',
debug-info-location: '!5' }
body: |
bb.0.entry:
diff --git a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
index 12917fd..0bb829d 100644
--- a/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir
@@ -20,7 +20,7 @@
stackSize: 4
maxAlignment: 4
# CHECK: fixedStack:
-# CHECK-NEXT: - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0
+# CHECK-NEXT: - { id: 0, type: default, offset: 0, size: 4, alignment: 4, stack-id: default
# CHECK-NEXT: isImmutable: true,
fixedStack:
- { id: 0, offset: 0, size: 4, alignment: 4, isImmutable: true, isAliased: false }
diff --git a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
index b5a6edb3..40b17c6 100644
--- a/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
@@ -19,7 +19,7 @@
frameInfo:
maxAlignment: 4
# CHECK: fixedStack:
-# CHECK-NEXT: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: 0,
+# CHECK-NEXT: - { id: 0, type: spill-slot, offset: 0, size: 4, alignment: 4, stack-id: default,
# CHECK-NEXT: callee-saved-register: '', callee-saved-restored: true, debug-info-variable: '',
# CHECK-NEXT: debug-info-expression: '', debug-info-location: '' }
fixedStack:
diff --git a/llvm/test/CodeGen/MIR/X86/stack-objects.mir b/llvm/test/CodeGen/MIR/X86/stack-objects.mir
index 0e2debe..12bcb24 100644
--- a/llvm/test/CodeGen/MIR/X86/stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/stack-objects.mir
@@ -22,13 +22,13 @@
maxAlignment: 8
# CHECK: stack:
# CHECK-NEXT: - { id: 0, name: b, type: default, offset: -12, size: 4, alignment: 4,
-# CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+# CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
# CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# CHECK-NEXT: - { id: 1, name: x, type: default, offset: -24, size: 8, alignment: 8,
-# CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+# CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
# CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# CHECK-NEXT: - { id: 2, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,
-# CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+# CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
# CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
- { id: 0, name: b, offset: -12, size: 4, alignment: 4 }
diff --git a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
index b8a8e59..e251dda 100644
--- a/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
+++ b/llvm/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
@@ -25,10 +25,10 @@
adjustsStack: true
# CHECK: stack:
# CHECK-NEXT: - { id: 0, name: '', type: default, offset: -20, size: 4, alignment: 4,
-# CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+# CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
# CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# CHECK-NEXT: - { id: 1, name: '', type: default, offset: -32, size: 8, alignment: 8,
-# CHECK-NEXT: stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+# CHECK-NEXT: stack-id: default, callee-saved-register: '', callee-saved-restored: true,
# CHECK-NEXT: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
# CHECK-NEXT: - { id: 2, name: y, type: variable-sized, offset: -32, alignment: 1,
stack:
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/pointers.mir b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/pointers.mir
index b5dce81..5995c7f 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/pointers.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/pointers.mir
@@ -36,7 +36,7 @@
regBankSelected: true
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir
index 3e04590..d2e09d6 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir
@@ -13,7 +13,7 @@
regBankSelected: true
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir
index 9b2dcad..dba5bc0 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/add.mir
@@ -260,10 +260,10 @@
alignment: 2
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: 0, isImmutable: true }
- - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
- - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: 0, isImmutable: true }
- - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: default, isImmutable: true }
+ - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: default, isImmutable: true }
+ - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: default, isImmutable: true }
+ - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul.mir
index 7312f46..cfb68cb 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/mul.mir
@@ -256,10 +256,10 @@
alignment: 2
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: 0, isImmutable: true }
- - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
- - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: 0, isImmutable: true }
- - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: default, isImmutable: true }
+ - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: default, isImmutable: true }
+ - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: default, isImmutable: true }
+ - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/pointers.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/pointers.mir
index bef6614..e42ab03 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/pointers.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/pointers.mir
@@ -32,7 +32,7 @@
alignment: 2
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir
index 2ba722d..36d2ed81 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir
@@ -11,7 +11,7 @@
alignment: 2
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub.mir b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub.mir
index b3f3791..d06287c 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/legalizer/sub.mir
@@ -255,10 +255,10 @@
alignment: 2
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: 0, isImmutable: true }
- - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
- - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: 0, isImmutable: true }
- - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: default, isImmutable: true }
+ - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: default, isImmutable: true }
+ - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: default, isImmutable: true }
+ - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/pointers.mir b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/pointers.mir
index 52a67ae..1a2f99a 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/pointers.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/pointers.mir
@@ -34,7 +34,7 @@
legalized: true
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir
index 43caa5e..80c66bc 100644
--- a/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir
+++ b/llvm/test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir
@@ -12,7 +12,7 @@
legalized: true
tracksRegLiveness: true
fixedStack:
- - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
liveins: $a0, $a1, $a2, $a3
diff --git a/llvm/test/CodeGen/Mips/micromips-eva.mir b/llvm/test/CodeGen/Mips/micromips-eva.mir
index cfa24c5..ba30a29 100644
--- a/llvm/test/CodeGen/Mips/micromips-eva.mir
+++ b/llvm/test/CodeGen/Mips/micromips-eva.mir
@@ -162,7 +162,7 @@
fixedStack:
stack:
- { id: 0, name: z.addr, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/Mips/micromips-short-delay-slot.mir b/llvm/test/CodeGen/Mips/micromips-short-delay-slot.mir
index 1f17b42..df6ca43 100644
--- a/llvm/test/CodeGen/Mips/micromips-short-delay-slot.mir
+++ b/llvm/test/CodeGen/Mips/micromips-short-delay-slot.mir
@@ -48,7 +48,7 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lwp-swp.mir b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lwp-swp.mir
index a23e333..4bdfa05 100644
--- a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lwp-swp.mir
+++ b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-lwp-swp.mir
@@ -49,13 +49,13 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s1', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s1', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
@@ -117,13 +117,13 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s1', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s1', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
@@ -185,13 +185,13 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s1', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s1', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
@@ -253,13 +253,13 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s1', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s1', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir
index 73b0b54..bd068f7 100644
--- a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir
+++ b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-movep.mir
@@ -15,7 +15,7 @@
name: move1
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
@@ -50,7 +50,7 @@
name: move2
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-no-lwp-swp.mir b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-no-lwp-swp.mir
index a38b082..a6423f4 100644
--- a/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-no-lwp-swp.mir
+++ b/llvm/test/CodeGen/Mips/micromips-sizereduction/micromips-no-lwp-swp.mir
@@ -47,10 +47,10 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
@@ -106,10 +106,10 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
@@ -165,10 +165,10 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
@@ -224,10 +224,10 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir b/llvm/test/CodeGen/PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir
index be28ac3..ca08b68b 100644
--- a/llvm/test/CodeGen/PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir
+++ b/llvm/test/CodeGen/PowerPC/NoCRFieldRedefWhenSpillingCRBIT.mir
@@ -76,13 +76,13 @@
fixedStack: []
stack:
- { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants: []
body: |
diff --git a/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir b/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
index eb058bc..a59c8ff 100644
--- a/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
+++ b/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
@@ -3074,23 +3074,23 @@
fixedStack:
stack:
- { id: 0, name: '', type: default, offset: 0, size: 16, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -16, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -20, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -24, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 3, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -28, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 4, name: '', type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -32, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/PowerPC/setcr_bc.mir b/llvm/test/CodeGen/PowerPC/setcr_bc.mir
index 034326b..19b5dc1 100644
--- a/llvm/test/CodeGen/PowerPC/setcr_bc.mir
+++ b/llvm/test/CodeGen/PowerPC/setcr_bc.mir
@@ -67,7 +67,7 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$x30', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/PowerPC/setcr_bc2.mir b/llvm/test/CodeGen/PowerPC/setcr_bc2.mir
index c7839a0..463186f 100644
--- a/llvm/test/CodeGen/PowerPC/setcr_bc2.mir
+++ b/llvm/test/CodeGen/PowerPC/setcr_bc2.mir
@@ -67,7 +67,7 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$x30', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/PowerPC/setcr_bc3.mir b/llvm/test/CodeGen/PowerPC/setcr_bc3.mir
index 49df90a..a0111c0 100644
--- a/llvm/test/CodeGen/PowerPC/setcr_bc3.mir
+++ b/llvm/test/CodeGen/PowerPC/setcr_bc3.mir
@@ -40,7 +40,7 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$x30', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/SystemZ/debuginstr-02.mir b/llvm/test/CodeGen/SystemZ/debuginstr-02.mir
index 1a781b1..459b7bb 100644
--- a/llvm/test/CodeGen/SystemZ/debuginstr-02.mir
+++ b/llvm/test/CodeGen/SystemZ/debuginstr-02.mir
@@ -69,7 +69,7 @@
frameInfo:
maxAlignment: 8
fixedStack:
- - { id: 0, size: 4, alignment: 8, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 8, stack-id: default, isImmutable: true }
body: |
bb.0 (%ir-block.0):
liveins: $r2l, $f0s, $f2s, $f4s, $f6s
diff --git a/llvm/test/CodeGen/SystemZ/subregliveness-06.mir b/llvm/test/CodeGen/SystemZ/subregliveness-06.mir
index 01e3341..d0dc165 100644
--- a/llvm/test/CodeGen/SystemZ/subregliveness-06.mir
+++ b/llvm/test/CodeGen/SystemZ/subregliveness-06.mir
@@ -152,8 +152,8 @@
frameInfo:
maxAlignment: 8
stack:
- - { id: 0, name: tmp, size: 4, alignment: 4, stack-id: 0 }
- - { id: 1, name: tmp2, size: 200, alignment: 8, stack-id: 0 }
+ - { id: 0, name: tmp, size: 4, alignment: 4, stack-id: default }
+ - { id: 1, name: tmp2, size: 200, alignment: 8, stack-id: default }
body: |
bb.0.bb:
liveins: $r2d, $r3d
diff --git a/llvm/test/CodeGen/Thumb/PR36658.mir b/llvm/test/CodeGen/Thumb/PR36658.mir
index b4c9c30..d6ec0ba 100644
--- a/llvm/test/CodeGen/Thumb/PR36658.mir
+++ b/llvm/test/CodeGen/Thumb/PR36658.mir
@@ -142,9 +142,9 @@
hasCalls: true
maxCallFrameSize: 0
stack:
- - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, stack-id: default,
callee-saved-register: '$lr', callee-saved-restored: false }
- - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: default,
callee-saved-register: '$r4' }
jumpTable:
kind: inline
diff --git a/llvm/test/CodeGen/Thumb2/high-reg-spill.mir b/llvm/test/CodeGen/Thumb2/high-reg-spill.mir
index 444ee0c..5d6fd43 100644
--- a/llvm/test/CodeGen/Thumb2/high-reg-spill.mir
+++ b/llvm/test/CodeGen/Thumb2/high-reg-spill.mir
@@ -32,7 +32,7 @@
- { id: 0, class: hgpr }
- { id: 1, class: tgpr }
stack:
- - { id: 0, name: i, size: 4, alignment: 4, stack-id: 0, local-offset: -4 }
+ - { id: 0, name: i, size: 4, alignment: 4, stack-id: default, local-offset: -4 }
body: |
bb.0.entry:
%1:tgpr = tLDRspi %stack.0.i, 0, 14, $noreg :: (dereferenceable load 4 from %ir.i)
diff --git a/llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir b/llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir
index b567dfc..75bb207 100644
--- a/llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir
+++ b/llvm/test/CodeGen/Thumb2/ifcvt-cbz.mir
@@ -17,10 +17,10 @@
- { reg: '$r0', virtual-reg: '' }
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r7', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
; CHECK-LABEL: name: f1
@@ -68,10 +68,10 @@
- { reg: '$r0', virtual-reg: '' }
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r7', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
; CHECK-LABEL: name: f2
@@ -125,10 +125,10 @@
- { reg: '$r0', virtual-reg: '' }
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r7', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
; CHECK-LABEL: name: f3
diff --git a/llvm/test/CodeGen/Thumb2/peephole-cmp.mir b/llvm/test/CodeGen/Thumb2/peephole-cmp.mir
index b033b4a..9a03c9c 100644
--- a/llvm/test/CodeGen/Thumb2/peephole-cmp.mir
+++ b/llvm/test/CodeGen/Thumb2/peephole-cmp.mir
@@ -14,7 +14,7 @@
- { reg: '$r0', virtual-reg: '%0' }
stack:
- { id: 0, name: f, type: default, offset: 0, size: 1, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
local-offset: -4, debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
body: |
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x32-select-frameIndex.mir b/llvm/test/CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
index fdff9b6..b03f0fe 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
@@ -18,7 +18,7 @@
fixedStack:
stack:
- { id: 0, name: ptr1, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
index be1e852..8307963 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-inttoptr.mir
@@ -21,7 +21,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: inttoptr_p0_s32
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-ptrtoint.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-ptrtoint.mir
index 60d876e..8db6b0f 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-ptrtoint.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-ptrtoint.mir
@@ -40,7 +40,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: ptrtoint_s1_p0
@@ -69,7 +69,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: ptrtoint_s8_p0
@@ -96,7 +96,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: ptrtoint_s16_p0
@@ -123,7 +123,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: ptrtoint_s32_p0
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir
index 777536a..13174ea 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-srem.mir
@@ -58,10 +58,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -120,10 +120,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -182,10 +182,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir
index b9c46b4..b2213ab 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-legalize-urem.mir
@@ -58,10 +58,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -120,10 +120,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -182,10 +182,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-frameIndex.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
index 9be49a1..80cbb6d 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
@@ -18,7 +18,7 @@
fixedStack:
stack:
- { id: 0, name: ptr1, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
index 29cc1c4..2fcdb20 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-select-inttoptr.mir
@@ -23,7 +23,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: inttoptr_p0_s32
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir
index 43e8619..90e71db 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-select-ptrtoint.mir
@@ -42,7 +42,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: ptrtoint_s1_p0
@@ -71,7 +71,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: ptrtoint_s8_p0
@@ -99,7 +99,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: ptrtoint_s16_p0
@@ -127,7 +127,7 @@
frameInfo:
maxAlignment: 4
fixedStack:
- - { id: 0, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 16, stack-id: default, isImmutable: true }
body: |
bb.1.entry:
; CHECK-LABEL: name: ptrtoint_s32_p0
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-srem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-srem.mir
index 50ebc9f..164d53e 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-srem.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-select-srem.mir
@@ -58,10 +58,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -120,10 +120,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -183,10 +183,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-udiv.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-udiv.mir
index afbbab7..7eff944 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-udiv.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-select-udiv.mir
@@ -58,10 +58,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -120,10 +120,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -184,10 +184,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-select-urem.mir b/llvm/test/CodeGen/X86/GlobalISel/x86-select-urem.mir
index 1ca33657..10d07da 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-select-urem.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-select-urem.mir
@@ -58,10 +58,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 1, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 1, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -120,10 +120,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 2, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 2, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
@@ -184,10 +184,10 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
index 75a1391..fe0cf03 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
@@ -18,7 +18,7 @@
fixedStack:
stack:
- { id: 0, name: ptr1, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
diff --git a/llvm/test/CodeGen/X86/PR37310.mir b/llvm/test/CodeGen/X86/PR37310.mir
index cb6a4b2..c35462b 100644
--- a/llvm/test/CodeGen/X86/PR37310.mir
+++ b/llvm/test/CodeGen/X86/PR37310.mir
@@ -101,10 +101,10 @@
fixedStack:
stack:
- { id: 0, name: q, type: default, offset: 0, size: 512, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: r, type: default, offset: 0, size: 512, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/X86/avoid-sfb-offset.mir b/llvm/test/CodeGen/X86/avoid-sfb-offset.mir
index 0b7a1db..659f1a0 100644
--- a/llvm/test/CodeGen/X86/avoid-sfb-offset.mir
+++ b/llvm/test/CodeGen/X86/avoid-sfb-offset.mir
@@ -72,10 +72,10 @@
fixedStack:
stack:
- { id: 0, name: a, type: default, offset: 0, size: 144, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: z, type: default, offset: 0, size: 144, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/CodeGen/X86/movtopush.mir b/llvm/test/CodeGen/X86/movtopush.mir
index ea22cb5..98769a2 100644
--- a/llvm/test/CodeGen/X86/movtopush.mir
+++ b/llvm/test/CodeGen/X86/movtopush.mir
@@ -88,15 +88,15 @@
fixedStack:
stack:
- { id: 0, name: p, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: q, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, name: s, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/X86/pr30821.mir b/llvm/test/CodeGen/X86/pr30821.mir
index 9fedd87..0fe889d 100644
--- a/llvm/test/CodeGen/X86/pr30821.mir
+++ b/llvm/test/CodeGen/X86/pr30821.mir
@@ -46,13 +46,13 @@
fixedStack:
stack:
- { id: 0, name: alpha, type: default, offset: 0, size: 1, alignment: 1,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: foxtrot, type: default, offset: 0, size: 16, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: india, type: default, offset: 0, size: 16, alignment: 16,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/CodeGen/X86/prologepilog_deref_size.mir b/llvm/test/CodeGen/X86/prologepilog_deref_size.mir
index 8422718..5b0e15b 100644
--- a/llvm/test/CodeGen/X86/prologepilog_deref_size.mir
+++ b/llvm/test/CodeGen/X86/prologepilog_deref_size.mir
@@ -43,7 +43,7 @@
name: foo
tracksRegLiveness: true
fixedStack:
- - { id: 0, type: default, offset: 24, size: 2, alignment: 8, stack-id: 0,
+ - { id: 0, type: default, offset: 24, size: 2, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
diff --git a/llvm/test/CodeGen/X86/regalloc-copy-hints.mir b/llvm/test/CodeGen/X86/regalloc-copy-hints.mir
index ce84b3b..64a6a73 100644
--- a/llvm/test/CodeGen/X86/regalloc-copy-hints.mir
+++ b/llvm/test/CodeGen/X86/regalloc-copy-hints.mir
@@ -105,7 +105,7 @@
maxAlignment: 4
hasCalls: true
fixedStack:
- - { id: 0, size: 4, alignment: 4, stack-id: 0, isImmutable: true }
+ - { id: 0, size: 4, alignment: 4, stack-id: default, isImmutable: true }
body: |
bb.0:
successors: %bb.1(0x00000001), %bb.2(0x7fffffff)
diff --git a/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
index c5cd254..33827e7 100644
--- a/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
+++ b/llvm/test/CodeGen/X86/shrink_wrap_dbg_value.mir
@@ -124,9 +124,9 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: default, offset: 4, size: 4, alignment: 4, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true }
- - { id: 1, type: default, offset: 0, size: 4, alignment: 4, stack-id: 0,
+ - { id: 1, type: default, offset: 0, size: 4, alignment: 4, stack-id: default,
isImmutable: false, isAliased: false, callee-saved-register: '',
callee-saved-restored: true }
stack:
diff --git a/llvm/test/CodeGen/X86/win_coreclr_chkstk_liveins.mir b/llvm/test/CodeGen/X86/win_coreclr_chkstk_liveins.mir
index 8da5f89..b7755ba 100644
--- a/llvm/test/CodeGen/X86/win_coreclr_chkstk_liveins.mir
+++ b/llvm/test/CodeGen/X86/win_coreclr_chkstk_liveins.mir
@@ -9,7 +9,7 @@
frameInfo:
maxAlignment: 8
stack:
- - { id: 0, size: 4096, alignment: 1, stack-id: 0 }
+ - { id: 0, size: 4096, alignment: 1, stack-id: default }
body: |
bb.0.entry:
$eax = IMPLICIT_DEF
diff --git a/llvm/test/DebugInfo/AArch64/asan-stack-vars.mir b/llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
index 4bbacc1..77872fb 100644
--- a/llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
+++ b/llvm/test/DebugInfo/AArch64/asan-stack-vars.mir
@@ -364,42 +364,42 @@
localFrameSize: 144
stack:
- { id: 0, name: StackGuardSlot, offset: -40, size: 8, alignment: 8,
- stack-id: 0, local-offset: -8 }
- - { id: 1, name: self.addr, offset: -168, size: 8, alignment: 8, stack-id: 0,
+ stack-id: default, local-offset: -8 }
+ - { id: 1, name: self.addr, offset: -168, size: 8, alignment: 8, stack-id: default,
local-offset: -136, debug-info-variable: '!45', debug-info-expression: '!DIExpression()',
debug-info-location: '!47' }
- - { id: 2, name: _cmd.addr, offset: -176, size: 8, alignment: 8, stack-id: 0,
+ - { id: 2, name: _cmd.addr, offset: -176, size: 8, alignment: 8, stack-id: default,
local-offset: -144, debug-info-variable: '!48', debug-info-expression: '!DIExpression()',
debug-info-location: '!47' }
- - { id: 3, name: MyAlloca, offset: -160, size: 96, alignment: 32, stack-id: 0,
+ - { id: 3, name: MyAlloca, offset: -160, size: 96, alignment: 32, stack-id: default,
local-offset: -128 }
- - { id: 4, type: spill-slot, offset: -184, size: 8, alignment: 8, stack-id: 0 }
- - { id: 5, type: spill-slot, offset: -192, size: 8, alignment: 8, stack-id: 0 }
- - { id: 6, type: spill-slot, offset: -200, size: 8, alignment: 8, stack-id: 0 }
- - { id: 7, type: spill-slot, offset: -208, size: 8, alignment: 8, stack-id: 0 }
- - { id: 8, type: spill-slot, offset: -216, size: 8, alignment: 8, stack-id: 0 }
- - { id: 9, type: spill-slot, offset: -224, size: 8, alignment: 8, stack-id: 0 }
- - { id: 10, type: spill-slot, offset: -232, size: 8, alignment: 8, stack-id: 0 }
- - { id: 11, type: spill-slot, offset: -240, size: 8, alignment: 8, stack-id: 0 }
- - { id: 12, type: spill-slot, offset: -248, size: 8, alignment: 8, stack-id: 0 }
- - { id: 13, type: spill-slot, offset: -256, size: 8, alignment: 8, stack-id: 0 }
- - { id: 14, type: spill-slot, offset: -264, size: 8, alignment: 8, stack-id: 0 }
- - { id: 15, type: spill-slot, offset: -272, size: 8, alignment: 8, stack-id: 0 }
- - { id: 16, type: spill-slot, offset: -280, size: 8, alignment: 8, stack-id: 0 }
- - { id: 17, type: spill-slot, offset: -288, size: 8, alignment: 8, stack-id: 0 }
- - { id: 18, type: spill-slot, offset: -296, size: 8, alignment: 8, stack-id: 0 }
- - { id: 19, type: spill-slot, offset: -304, size: 8, alignment: 8, stack-id: 0 }
- - { id: 20, type: spill-slot, offset: -312, size: 8, alignment: 8, stack-id: 0 }
- - { id: 21, type: spill-slot, offset: -320, size: 8, alignment: 8, stack-id: 0 }
- - { id: 22, type: spill-slot, offset: -328, size: 8, alignment: 8, stack-id: 0 }
- - { id: 23, type: spill-slot, offset: -336, size: 8, alignment: 8, stack-id: 0 }
- - { id: 24, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: 0,
+ - { id: 4, type: spill-slot, offset: -184, size: 8, alignment: 8, stack-id: default }
+ - { id: 5, type: spill-slot, offset: -192, size: 8, alignment: 8, stack-id: default }
+ - { id: 6, type: spill-slot, offset: -200, size: 8, alignment: 8, stack-id: default }
+ - { id: 7, type: spill-slot, offset: -208, size: 8, alignment: 8, stack-id: default }
+ - { id: 8, type: spill-slot, offset: -216, size: 8, alignment: 8, stack-id: default }
+ - { id: 9, type: spill-slot, offset: -224, size: 8, alignment: 8, stack-id: default }
+ - { id: 10, type: spill-slot, offset: -232, size: 8, alignment: 8, stack-id: default }
+ - { id: 11, type: spill-slot, offset: -240, size: 8, alignment: 8, stack-id: default }
+ - { id: 12, type: spill-slot, offset: -248, size: 8, alignment: 8, stack-id: default }
+ - { id: 13, type: spill-slot, offset: -256, size: 8, alignment: 8, stack-id: default }
+ - { id: 14, type: spill-slot, offset: -264, size: 8, alignment: 8, stack-id: default }
+ - { id: 15, type: spill-slot, offset: -272, size: 8, alignment: 8, stack-id: default }
+ - { id: 16, type: spill-slot, offset: -280, size: 8, alignment: 8, stack-id: default }
+ - { id: 17, type: spill-slot, offset: -288, size: 8, alignment: 8, stack-id: default }
+ - { id: 18, type: spill-slot, offset: -296, size: 8, alignment: 8, stack-id: default }
+ - { id: 19, type: spill-slot, offset: -304, size: 8, alignment: 8, stack-id: default }
+ - { id: 20, type: spill-slot, offset: -312, size: 8, alignment: 8, stack-id: default }
+ - { id: 21, type: spill-slot, offset: -320, size: 8, alignment: 8, stack-id: default }
+ - { id: 22, type: spill-slot, offset: -328, size: 8, alignment: 8, stack-id: default }
+ - { id: 23, type: spill-slot, offset: -336, size: 8, alignment: 8, stack-id: default }
+ - { id: 24, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$lr' }
- - { id: 25, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: 0,
+ - { id: 25, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$fp' }
- - { id: 26, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0,
+ - { id: 26, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x27' }
- - { id: 27, type: spill-slot, offset: -32, size: 8, alignment: 8, stack-id: 0,
+ - { id: 27, type: spill-slot, offset: -32, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$x28' }
body: |
bb.0.entry:
@@ -662,9 +662,9 @@
hasCalls: true
maxCallFrameSize: 0
stack:
- - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$lr' }
- - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$fp' }
body: |
bb.0 (%ir-block.0):
diff --git a/llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir b/llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
index 79f2ac7..31ef5b4 100644
--- a/llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
+++ b/llvm/test/DebugInfo/AArch64/compiler-gen-bbs-livedebugvalues.mir
@@ -66,10 +66,10 @@
hasCalls: true
maxCallFrameSize: 0
stack:
- - { id: 0, type: spill-slot, offset: -20, size: 4, alignment: 4, stack-id: 0 }
- - { id: 1, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -20, size: 4, alignment: 4, stack-id: default }
+ - { id: 1, type: spill-slot, offset: -8, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$lr' }
- - { id: 2, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: 0,
+ - { id: 2, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$fp' }
body: |
; CHECK-LABEL: bb.0.entry:
diff --git a/llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir b/llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
index d080888..0b92d6b 100644
--- a/llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
+++ b/llvm/test/DebugInfo/ARM/cfi-eof-prologue.mir
@@ -148,9 +148,9 @@
hasCalls: true
maxCallFrameSize: 0
stack:
- - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, stack-id: default,
callee-saved-register: '$lr', callee-saved-restored: false }
- - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: default,
callee-saved-register: '$r4' }
body: |
bb.0.entry:
@@ -184,9 +184,9 @@
hasCalls: true
maxCallFrameSize: 0
stack:
- - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -4, size: 4, alignment: 4, stack-id: default,
callee-saved-register: '$lr', callee-saved-restored: false }
- - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -8, size: 4, alignment: 4, stack-id: default,
callee-saved-register: '$r4' }
body: |
bb.0.entry:
diff --git a/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
index e29420e..cf4b6c4 100644
--- a/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
+++ b/llvm/test/DebugInfo/MIR/ARM/live-debug-values-reg-copy.mir
@@ -97,16 +97,16 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$lr', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$lr', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r11', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r5', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$r4', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir b/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
index b123969..a45f603 100644
--- a/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
@@ -139,15 +139,15 @@
fixedStack:
stack:
- { id: 0, name: condition, type: default, offset: -12, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$ra', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '$s0', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
index dd009b8..7b29eb4 100644
--- a/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
+++ b/llvm/test/DebugInfo/MIR/Mips/live-debug-values-reg-copy.mir
@@ -121,16 +121,16 @@
fixedStack:
stack:
- { id: 0, name: '', type: spill-slot, offset: -8, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d25_64', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d25_64', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -16, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$d24_64', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$d24_64', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, name: '', type: spill-slot, offset: -24, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$ra_64', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$ra_64', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, name: '', type: spill-slot, offset: -32, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '$s0_64', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '$s0_64', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
- id: 0
diff --git a/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir b/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
index 3863f43..f78abfc 100644
--- a/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
+++ b/llvm/test/DebugInfo/MIR/X86/dbg-stack-value-range.mir
@@ -134,12 +134,12 @@
adjustsStack: true
hasCalls: true
fixedStack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$r14d', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
stack:
- { id: 0, name: local1, type: default, offset: -20, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
bb.0.entry:
diff --git a/llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir b/llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
index 3fb1e0b..c585293 100644
--- a/llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
+++ b/llvm/test/DebugInfo/MIR/X86/debug-loc-0.mir
@@ -89,7 +89,7 @@
fixedStack: []
stack:
- { id: 0, name: s1.addr, type: default, offset: 0, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants: []
body: |
diff --git a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
index 81013ac..0c7edf3 100644
--- a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
+++ b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
@@ -228,25 +228,25 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$rbx', callee-saved-restored: true }
- - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$r12', callee-saved-restored: true }
- - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: 0,
+ - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$r13', callee-saved-restored: true }
- - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: 0,
+ - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$r14', callee-saved-restored: true }
- - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0,
+ - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$r15', callee-saved-restored: true }
- - { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '', callee-saved-restored: true }
stack:
- { id: 0, name: '', type: spill-slot, offset: -64, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
- { id: 1, name: '', type: spill-slot, offset: -60, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '',
debug-info-location: '' }
constants:
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
index 9ab6743..70c3fb5 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir
@@ -126,13 +126,13 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$rbx', callee-saved-restored: true }
- - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$rbp', callee-saved-restored: true }
stack:
- { id: 0, name: local1, type: default, offset: -28, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
index 15c549e..2c3feee 100644
--- a/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
+++ b/llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
@@ -109,27 +109,27 @@
savePoint: ''
restorePoint: ''
fixedStack:
- - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$rbx', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
- - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: 0,
+ - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$r12', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
- - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: 0,
+ - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$r13', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
- - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: 0,
+ - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$r14', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
- - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0,
+ - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default,
callee-saved-register: '$r15', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
- - { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0,
+ - { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default,
callee-saved-register: '$rbp', callee-saved-restored: true, debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
stack:
- { id: 0, name: '', type: spill-slot, offset: -64, size: 8, alignment: 8,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true,
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
constants: []
body: |
diff --git a/llvm/test/DebugInfo/X86/debug-loc-asan.mir b/llvm/test/DebugInfo/X86/debug-loc-asan.mir
index c4f3354..1b92e0c 100644
--- a/llvm/test/DebugInfo/X86/debug-loc-asan.mir
+++ b/llvm/test/DebugInfo/X86/debug-loc-asan.mir
@@ -197,18 +197,18 @@
hasCalls: true
maxCallFrameSize: 0
fixedStack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0 }
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default }
stack:
- - { id: 0, name: MyAlloca, offset: -96, size: 64, alignment: 32, stack-id: 0 }
- - { id: 1, type: spill-slot, offset: -100, size: 4, alignment: 4, stack-id: 0 }
- - { id: 2, type: spill-slot, offset: -112, size: 8, alignment: 8, stack-id: 0 }
- - { id: 3, type: spill-slot, offset: -120, size: 8, alignment: 8, stack-id: 0 }
- - { id: 4, type: spill-slot, offset: -128, size: 8, alignment: 8, stack-id: 0 }
- - { id: 5, type: spill-slot, offset: -136, size: 8, alignment: 8, stack-id: 0 }
- - { id: 6, type: spill-slot, offset: -144, size: 8, alignment: 8, stack-id: 0 }
- - { id: 7, type: spill-slot, offset: -145, size: 1, alignment: 1, stack-id: 0 }
- - { id: 8, type: spill-slot, offset: -146, size: 1, alignment: 1, stack-id: 0 }
- - { id: 9, type: spill-slot, offset: -152, size: 4, alignment: 4, stack-id: 0 }
+ - { id: 0, name: MyAlloca, offset: -96, size: 64, alignment: 32, stack-id: default }
+ - { id: 1, type: spill-slot, offset: -100, size: 4, alignment: 4, stack-id: default }
+ - { id: 2, type: spill-slot, offset: -112, size: 8, alignment: 8, stack-id: default }
+ - { id: 3, type: spill-slot, offset: -120, size: 8, alignment: 8, stack-id: default }
+ - { id: 4, type: spill-slot, offset: -128, size: 8, alignment: 8, stack-id: default }
+ - { id: 5, type: spill-slot, offset: -136, size: 8, alignment: 8, stack-id: default }
+ - { id: 6, type: spill-slot, offset: -144, size: 8, alignment: 8, stack-id: default }
+ - { id: 7, type: spill-slot, offset: -145, size: 1, alignment: 1, stack-id: default }
+ - { id: 8, type: spill-slot, offset: -146, size: 1, alignment: 1, stack-id: default }
+ - { id: 9, type: spill-slot, offset: -152, size: 4, alignment: 4, stack-id: default }
body: |
bb.0.entry:
liveins: $edi
diff --git a/llvm/test/DebugInfo/X86/debug-loc-offset.mir b/llvm/test/DebugInfo/X86/debug-loc-offset.mir
index be4213c..aab8f66 100644
--- a/llvm/test/DebugInfo/X86/debug-loc-offset.mir
+++ b/llvm/test/DebugInfo/X86/debug-loc-offset.mir
@@ -185,10 +185,10 @@
maxAlignment: 4
maxCallFrameSize: 0
fixedStack:
- - { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 8, stack-id: 0 }
- - { id: 1, size: 4, alignment: 16, stack-id: 0 }
+ - { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 8, stack-id: default }
+ - { id: 1, size: 4, alignment: 16, stack-id: default }
stack:
- - { id: 0, type: spill-slot, offset: -12, size: 4, alignment: 4, stack-id: 0 }
+ - { id: 0, type: spill-slot, offset: -12, size: 4, alignment: 4, stack-id: default }
body: |
bb.0.entry:
frame-setup PUSH32r killed $ebp, implicit-def $esp, implicit $esp
@@ -222,13 +222,13 @@
hasCalls: true
maxCallFrameSize: 4
fixedStack:
- - { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 8, stack-id: 0 }
- - { id: 1, size: 4, alignment: 16, stack-id: 0, isImmutable: true }
+ - { id: 0, type: spill-slot, offset: -8, size: 4, alignment: 8, stack-id: default }
+ - { id: 1, size: 4, alignment: 16, stack-id: default, isImmutable: true }
stack:
- - { id: 0, name: z, offset: -12, size: 4, alignment: 4, stack-id: 0,
+ - { id: 0, name: z, offset: -12, size: 4, alignment: 4, stack-id: default,
debug-info-variable: '!22', debug-info-expression: '!DIExpression()',
debug-info-location: '!23' }
- - { id: 1, type: spill-slot, offset: -16, size: 4, alignment: 4, stack-id: 0 }
+ - { id: 1, type: spill-slot, offset: -16, size: 4, alignment: 4, stack-id: default }
body: |
bb.0.entry:
frame-setup PUSH32r killed $ebp, implicit-def $esp, implicit $esp
diff --git a/llvm/test/DebugInfo/X86/dw_op_minus.mir b/llvm/test/DebugInfo/X86/dw_op_minus.mir
index 574e5ae..21c8c5a 100644
--- a/llvm/test/DebugInfo/X86/dw_op_minus.mir
+++ b/llvm/test/DebugInfo/X86/dw_op_minus.mir
@@ -92,8 +92,8 @@
hasCalls: true
maxCallFrameSize: 0
stack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: 0 }
- - { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0 }
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 8, stack-id: default }
+ - { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: default }
body: |
bb.0.entry:
$rsp = frame-setup SUB64ri8 $rsp, 24, implicit-def dead $eflags
diff --git a/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir b/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
index 3a82c9d..0634f1f 100644
--- a/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
+++ b/llvm/test/DebugInfo/X86/live-debug-vars-dse.mir
@@ -119,7 +119,7 @@
fixedStack:
stack:
- { id: 0, name: x.addr, type: default, offset: 0, size: 4, alignment: 4,
- stack-id: 0, callee-saved-register: '', debug-info-variable: '',
+ stack-id: default, callee-saved-register: '', debug-info-variable: '',
debug-info-expression: '', debug-info-location: '' }
constants:
body: |
diff --git a/llvm/test/DebugInfo/X86/pr19307.mir b/llvm/test/DebugInfo/X86/pr19307.mir
index 06b95bc..dd6c986 100644
--- a/llvm/test/DebugInfo/X86/pr19307.mir
+++ b/llvm/test/DebugInfo/X86/pr19307.mir
@@ -158,16 +158,16 @@
hasCalls: true
maxCallFrameSize: 0
fixedStack:
- - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0 }
+ - { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: default }
stack:
- - { id: 0, name: offset.addr, offset: -24, size: 8, alignment: 8, stack-id: 0,
+ - { id: 0, name: offset.addr, offset: -24, size: 8, alignment: 8, stack-id: default,
debug-info-variable: '!41', debug-info-expression: '!DIExpression()',
debug-info-location: '!42' }
- - { id: 1, name: limit.addr, offset: -32, size: 8, alignment: 8, stack-id: 0,
+ - { id: 1, name: limit.addr, offset: -32, size: 8, alignment: 8, stack-id: default,
debug-info-variable: '!43', debug-info-expression: '!DIExpression()',
debug-info-location: '!42' }
- - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: 0 }
- - { id: 3, type: spill-slot, offset: -48, size: 8, alignment: 8, stack-id: 0 }
+ - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: default }
+ - { id: 3, type: spill-slot, offset: -48, size: 8, alignment: 8, stack-id: default }
body: |
bb.0.entry:
liveins: $rdi, $rsi, $rdx
diff --git a/llvm/test/DebugInfo/X86/prolog-params.mir b/llvm/test/DebugInfo/X86/prolog-params.mir
index 3c6761a..df8c542 100644
--- a/llvm/test/DebugInfo/X86/prolog-params.mir
+++ b/llvm/test/DebugInfo/X86/prolog-params.mir
@@ -92,15 +92,15 @@
name: foo
tracksRegLiveness: true
fixedStack:
- - { id: 0, type: default, offset: 16, size: 4, alignment: 16, stack-id: 0,
+ - { id: 0, type: default, offset: 16, size: 4, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true }
- - { id: 1, type: default, offset: 8, size: 4, alignment: 8, stack-id: 0,
+ - { id: 1, type: default, offset: 8, size: 4, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true }
- - { id: 2, type: default, offset: 0, size: 4, alignment: 16, stack-id: 0,
+ - { id: 2, type: default, offset: 0, size: 4, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true }
stack:
- { id: 0, name: arr, type: default, offset: 0, size: 8, alignment: 4,
- stack-id: 0, callee-saved-register: '', callee-saved-restored: true }
+ stack-id: default, callee-saved-register: '', callee-saved-restored: true }
body: |
bb.0.entry:
DBG_VALUE $edi, $noreg, !18, !DIExpression(), debug-location !28