Build breakage.
llvm-svn: 28475
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 109f85a..83bf7f0 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -555,14 +555,15 @@
switch (Arg.getValueType()) {
default: assert(0 && "Unexpected ValueType for argument!");
case MVT::i8:
- case MVT::i16:
+ case MVT::i16: {
// Promote the integer to 32 bits. If the input type is signed use a
// sign extend, otherwise use a zero extend.
unsigned ExtOp =
dyn_cast<ConstantSDNode>(Op.getOperand(5+2*i+1))->getValue() ?
ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
Arg = DAG.getNode(ExtOp, MVT::i32, Arg);
- // Fallthrough
+ }
+ // Fallthrough
case MVT::i32:
case MVT::f32: {
@@ -690,7 +691,6 @@
case MVT::v2i64:
case MVT::v4f32:
case MVT::v2f64:
- case MVT::Vector:
Chain = DAG.getCopyFromReg(Chain, X86::XMM0, RetVT, InFlag).getValue(1);
ResultVals.push_back(Chain.getValue(0));
NodeTys.push_back(RetVT);
@@ -979,16 +979,15 @@
case MVT::f64:
MF.addLiveOut(X86::ST0);
break;
- case MVT::Vector: {
- const PackedType *PTy = cast<PackedType>(MF.getFunction()->getReturnType());
- MVT::ValueType EVT;
- MVT::ValueType LVT;
- unsigned NumRegs = getPackedTypeBreakdown(PTy, EVT, LVT);
- assert(NumRegs == 1 && "Unsupported type!");
+ case MVT::v16i8:
+ case MVT::v8i16:
+ case MVT::v4i32:
+ case MVT::v2i64:
+ case MVT::v4f32:
+ case MVT::v2f64:
MF.addLiveOut(X86::XMM0);
break;
}
- }
// Return the new list of results.
std::vector<MVT::ValueType> RetVTs(Op.Val->value_begin(),
@@ -1046,14 +1045,13 @@
case MVT::v4i32:
case MVT::v2i64:
case MVT::v4f32:
- case MVT::v2f64: {
+ case MVT::v2f64:
if (NumXMMRegs < 3)
NumXMMRegs++;
else
NumBytes += 16;
break;
}
- }
}
// Make sure the instruction takes 8n+4 bytes to make sure the start of the
@@ -1106,7 +1104,7 @@
case MVT::v4i32:
case MVT::v2i64:
case MVT::v4f32:
- case MVT::v2f64: {
+ case MVT::v2f64:
if (NumXMMRegs < 3) {
RegsToPass.push_back(std::make_pair(XMMArgRegs[NumXMMRegs], Arg));
NumXMMRegs++;
@@ -1118,7 +1116,6 @@
ArgOffset += 16;
}
}
- }
}
if (!MemOpChains.empty())
@@ -1202,7 +1199,6 @@
case MVT::v2i64:
case MVT::v4f32:
case MVT::v2f64:
- case MVT::Vector:
Chain = DAG.getCopyFromReg(Chain, X86::XMM0, RetVT, InFlag).getValue(1);
ResultVals.push_back(Chain.getValue(0));
NodeTys.push_back(RetVT);