commit 5f37623218b25eed473f978fe779fee8fc17e9e6
author Chris Lattner <sabre@nondot.org> Wed Oct 19 01:50:36 2005 +0000
committer Chris Lattner <sabre@nondot.org> Wed Oct 19 01:50:36 2005 +0000
tree ef08548fd8c901baf0b05b3a9829544c21acb110
parent 62041778e6ddb74f02390eb8eb52da4a966a0792

teach ppc backend these are copies

llvm-svn: 23813

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp

diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index cfeda7b..f1cd9f56 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -25,7 +25,8 @@
                                unsigned& sourceReg,
                                unsigned& destReg) const {
   MachineOpCode oc = MI.getOpcode();
-  if (oc == PPC::OR4 || oc == PPC::OR8) {                      // or r1, r2, r2
+  if (oc == PPC::OR4 || oc == PPC::OR8 || 
+      oc == PPC::OR4To8 || oc == PPC::OR8To4) {                // or r1, r2, r2
     assert(MI.getNumOperands() == 3 &&
            MI.getOperand(0).isRegister() &&
            MI.getOperand(1).isRegister() &&