commit 5f4ef3c5a88f058ad98611c24617f41bc6a45d50
author Jeff Cohen <jeffc@jolt-lang.org> Wed Jul 27 06:12:32 2005 +0000
committer Jeff Cohen <jeffc@jolt-lang.org> Wed Jul 27 06:12:32 2005 +0000
tree 3c31e3e2214e6adfa39e09862f9a26865f575847
parent 8e2411334cd0d7f6be54dd2b5d5cc012b6e604a1

Eliminate all remaining tabs and trailing spaces.

llvm-svn: 22523

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 91fbf98..530422d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1212,7 +1212,7 @@
     break;
   case ISD::SUB:
     if (N1.getOpcode() == ISD::ADD) {
-      if (N1.Val->getOperand(0) == N2 && 
+      if (N1.Val->getOperand(0) == N2 &&
           !MVT::isFloatingPoint(N2.getValueType()))
         return N1.Val->getOperand(1);         // (A+B)-A == B
       if (N1.Val->getOperand(1) == N2 &&
@@ -1233,7 +1233,7 @@
     if (N1.getOpcode() == ISD::SIGN_EXTEND_INREG)
       if (cast<VTSDNode>(N1.getOperand(1))->getVT() <= EVT)
         return N1;
-    
+
     // If we are sign extending a sextload, return just the load.
     if (N1.getOpcode() == ISD::SEXTLOAD)
       if (cast<VTSDNode>(N1.getOperand(3))->getVT() <= EVT)
@@ -1311,7 +1311,7 @@
 
 
 SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
-                                SDOperand Chain, SDOperand Ptr, 
+                                SDOperand Chain, SDOperand Ptr,
                                 SDOperand SV) {
   SDNode *&N = Loads[std::make_pair(Ptr, std::make_pair(Chain, VT))];
   if (N) return SDOperand(N, 0);
@@ -1457,7 +1457,7 @@
 }
 
 SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,
-                                SDOperand N1, SDOperand N2, SDOperand N3, 
+                                SDOperand N1, SDOperand N2, SDOperand N3,
                                 SDOperand N4) {
   std::vector<SDOperand> Ops;
   Ops.reserve(4);