| commit | 5f957b54c83e4bf44ad55877ed4ab5bd706d7c4f | [log] [tgz] |
|---|---|---|
| author | Valentina Giusti <valentina.giusti@intel.com> | Wed Sep 14 17:27:48 2016 +0000 |
| committer | Valentina Giusti <valentina.giusti@intel.com> | Wed Sep 14 17:27:48 2016 +0000 |
| tree | c9f31ef38de9d088a6bcda5f49739e60bcc0a94b | |
| parent | e8e0f5cac6d80b489e58a369a5389387ff91d60a [diff] |
Use Intel CPU flags to determine target supported features. Summary: This patch uses the instruction CPUID to verify that FXSAVE, XSAVE, AVX and MPX are supported by the target hardware. In case the HW supports XSAVE, and at least one of the extended register sets, it further checks if the target software has the kernel support for such features, by verifying that their XSAVE part is correctly managed. Differential Revision: https://reviews.llvm.org/D24559 llvm-svn: 281507