commit 5fb34b5498f3349fb7cbe9039e35eb2fd635ff59
author Craig Topper <craig.topper@intel.com> Tue Nov 27 18:05:00 2018 +0000
committer Craig Topper <craig.topper@intel.com> Tue Nov 27 18:05:00 2018 +0000
tree 698b3b93a1b545cd75f8f217283c808ec31e2eb4
parent e3459295ee0760c5b0f794fba9e7d374198d88ce

[X86] Add cascade lake arch in X86 target.

This is skylake-avx512 with the addition of avx512vnni ISA.

Patch by Jianping Chen

Differential Revision: https://reviews.llvm.org/D54785

llvm-svn: 347681

llvm/lib/Target/X86/X86.td

diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
index 7413565..6b1749f 100644
--- a/llvm/lib/Target/X86/X86.td
+++ b/llvm/lib/Target/X86/X86.td
@@ -883,6 +883,17 @@
 def : SkylakeServerProc<"skylake-avx512">;
 def : SkylakeServerProc<"skx">; // Legacy alias.
 
+def CLXFeatures : ProcessorFeatures<SKXFeatures.Value, [
+  FeatureVNNI
+]>;
+
+class CascadelakeProc<string Name> : ProcModel<Name, SkylakeServerModel,
+                                              CLXFeatures.Value, [
+  FeatureHasFastGather,
+  FeaturePOPCNTFalseDeps
+]>;
+def : CascadelakeProc<"cascadelake">;
+
 def CNLFeatures : ProcessorFeatures<SKLFeatures.Value, [
   FeatureAVX512,
   FeatureCDI,