commit 602a16d3db1142bb2474c82fd4f9fe97f3fe0acf
author Matt Arsenault <Matthew.Arsenault@amd.com> Wed Aug 26 19:12:03 2015 +0000
committer Matt Arsenault <Matthew.Arsenault@amd.com> Wed Aug 26 19:12:03 2015 +0000
tree e634e19e0c609d5a1d4eb0889538c53e7fe14654
parent b610a45c7bad22b5186c4c2b4fa22d8b8018632a

AMDGPU/SI: Report SIFixSGPRLiveRanges changed function

llvm-svn: 246056

llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp

diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp b/llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp
index 5f25c69..abe3314 100644
--- a/llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFixSGPRLiveRanges.cpp
@@ -114,6 +114,7 @@
   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
   const SIRegisterInfo *TRI = static_cast<const SIRegisterInfo *>(
       MF.getSubtarget().getRegisterInfo());
+  bool MadeChange = false;
 
   MachinePostDominatorTree *PDT = &getAnalysis<MachinePostDominatorTree>();
   std::vector<std::pair<unsigned, LiveRange *>> SGPRLiveRanges;
@@ -209,6 +210,8 @@
                 TII->get(AMDGPU::SGPR_USE))
         .addReg(Reg, RegState::Implicit);
 
+      MadeChange = true;
+
       SlotIndex SI = LIS->InsertMachineInstrInMaps(NCDSGPRUse);
       LIS->extendToIndices(*LR, SI.getRegSlot());
 
@@ -221,5 +224,5 @@
     }
   }
 
-  return false;
+  return MadeChange;
 }