ARM STRH encoding information.
llvm-svn: 118757
diff --git a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
index 1d3e310..49d8ade 100644
--- a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -202,6 +202,8 @@
Binary |= (Reg << 13);
return Binary;
}
+ uint32_t getAddrMode3OpValue(const MachineInstr &MI, unsigned Op) const
+ { return 0; }
uint32_t getAddrMode5OpValue(const MachineInstr &MI, unsigned Op) const {
// {12-9} = reg
// {8} = (U)nsigned (add == '1', sub == '0')