[MachineOperand][MIR] Add isRenamable to MachineOperand.
Summary:
Add isRenamable() predicate to MachineOperand. This predicate can be
used by machine passes after register allocation to determine whether it
is safe to rename a given register operand. Register operands that
aren't marked as renamable may be required to be assigned their current
register to satisfy constraints that are not captured by the machine
IR (e.g. ABI or ISA constraints).
Reviewers: qcolombet, MatzeB, hfinkel
Subscribers: nemanjai, mcrosier, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D39400
llvm-svn: 320503
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index de951e4..6ec3fc8 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -1060,6 +1060,9 @@
case MIToken::kw_debug_use:
Flags |= RegState::Debug;
break;
+ case MIToken::kw_renamable:
+ Flags |= RegState::Renamable;
+ break;
default:
llvm_unreachable("The current token should be a register flag");
}
@@ -1212,7 +1215,8 @@
Reg, Flags & RegState::Define, Flags & RegState::Implicit,
Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
- Flags & RegState::InternalRead);
+ Flags & RegState::InternalRead, Flags & RegState::Renamable);
+
return false;
}
@@ -1880,6 +1884,7 @@
case MIToken::kw_internal:
case MIToken::kw_early_clobber:
case MIToken::kw_debug_use:
+ case MIToken::kw_renamable:
case MIToken::underscore:
case MIToken::NamedRegister:
case MIToken::VirtualRegister: