commit 60cf6fc58ff92b40d706c06006ce26c54ef41eb4
author Tim Northover <tnorthover@apple.com> Tue Oct 11 20:50:04 2016 +0000
committer Tim Northover <tnorthover@apple.com> Tue Oct 11 20:50:04 2016 +0000
tree 4487fcd16773406b13cdedf5b41f312c27b5906e
parent 764f9f7806aaaf41417d9c75091031a6c92099db

MIRParser: allow types on registers with a RegBank.

This fixes some GlobalISel regression tests.

llvm-svn: 283936

llvm/lib/CodeGen/MIRParser/MIParser.cpp

diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 0f58e61..74394d4 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -990,7 +990,8 @@
     // Virtual registers may have a size with GlobalISel.
     if (!TargetRegisterInfo::isVirtualRegister(Reg))
       return error("unexpected size on physical register");
-    if (RegInfo->Kind != VRegInfo::GENERIC)
+    if (RegInfo->Kind != VRegInfo::GENERIC &&
+        RegInfo->Kind != VRegInfo::REGBANK)
       return error("unexpected size on non-generic virtual register");
 
     LLT Ty;