[mips] Optimize materialization of i64 constants
Avoid MipsAnalyzeImmediate usage if the constant fits in an 32-bit
integer. This allows us to generate the same instructions for the
materialization of the same constants regardless the width of their
type.
Patch by: Vasileios Kalintiris
Contributions by: Simon Dardis
Reviewers: Daniel Sanders
Differential Review: https://reviews.llvm.org/D21689
llvm-svn: 276628
diff --git a/llvm/test/CodeGen/Mips/llvm-ir/add.ll b/llvm/test/CodeGen/Mips/llvm-ir/add.ll
index 7a60585..756e5fe 100644
--- a/llvm/test/CodeGen/Mips/llvm-ir/add.ll
+++ b/llvm/test/CodeGen/Mips/llvm-ir/add.ll
@@ -284,7 +284,7 @@
; MM32: li16 $[[T1:[0-9]+]], 4
; MM32: sltu $[[T1]], $[[T0]], $[[T1]]
; MM32: addu $[[T2:[0-9]+]], $6, $[[T1]]
- ; MM32: lui $[[T1]], 0
+ ; MM32: li16 $[[T1]], 0
; MM32: sltu $[[T3:[0-9]+]], $[[T2]], $[[T1]]
; MM32: addu $[[T3]], $5, $[[T3]]
; MM32: sltu $[[T1]], $[[T3]], $[[T1]]
@@ -414,7 +414,7 @@
; MM32: li16 $[[T1:[0-9]+]], 3
; MM32: sltu $[[T1]], $[[T0]], $[[T1]]
; MM32: addu $[[T2:[0-9]+]], $6, $[[T1]]
- ; MM32: lui $[[T3:[0-9]+]], 0
+ ; MM32: li16 $[[T3:[0-9]+]], 0
; MM32: sltu $[[T4:[0-9]+]], $[[T2]], $[[T3]]
; MM32: addu $[[T4]], $5, $[[T4]]
; MM32: sltu $[[T5:[0-9]+]], $[[T4]], $[[T3]]