[MC] Use .p2align instead of .align
For historic reasons, the behavior of .align differs between targets.
Fortunately, there are alternatives, .p2align and .balign, which make the
interpretation of the parameter explicit, and which behave consistently across
targets.
This patch teaches MC to use .p2align instead of .align, so that people reading
code for multiple architectures don't have to remember which way each platform
does its .align directive.
Differential Revision: http://reviews.llvm.org/D16549
llvm-svn: 258750
diff --git a/llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll b/llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll
index 4ab2bee..2eedde5 100644
--- a/llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-swizzle-tbl-i16-layout.ll
@@ -4,7 +4,7 @@
; getting both the endianness wrong and the element indexing wrong.
define <8 x i16> @foo(<8 x i16> %a) nounwind readnone {
; CHECK: .section __TEXT,__literal16,16byte_literals
-; CHECK: .align 4
+; CHECK: .p2align 4
; CHECK:lCPI0_0:
; CHECK: .byte 0 ; 0x0
; CHECK: .byte 1 ; 0x1
@@ -24,7 +24,7 @@
; CHECK: .byte 9 ; 0x9
; CHECK: .section __TEXT,__text,regular,pure_instructions
; CHECK: .globl _foo
-; CHECK: .align 2
+; CHECK: .p2align 2
; CHECK:_foo: ; @foo
; CHECK: adrp [[BASE:x[0-9]+]], lCPI0_0@PAGE
; CHECK: ldr q[[REG:[0-9]+]], {{\[}}[[BASE]], lCPI0_0@PAGEOFF]
diff --git a/llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll b/llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll
index c95eca0..bb9ad46 100644
--- a/llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-tls-dynamic-together.ll
@@ -40,7 +40,7 @@
; EMU-NOT: __emutls_v.general_dynamic_var:
-; EMU: .align 3
+; EMU: .p2align 3
; EMU-LABEL: __emutls_v.emulated_init_var:
; EMU-NEXT: .xword 4
; EMU-NEXT: .xword 8
diff --git a/llvm/test/CodeGen/AArch64/emutls.ll b/llvm/test/CodeGen/AArch64/emutls.ll
index f2a9255..b2eb913 100644
--- a/llvm/test/CodeGen/AArch64/emutls.ll
+++ b/llvm/test/CodeGen/AArch64/emutls.ll
@@ -189,7 +189,7 @@
; ARM64: .section .data.__emutls_v._ZN1AIiE1xE,{{.*}},__emutls_v._ZN1AIiE1xE,comdat
; ARM64: .weak __emutls_v._ZN1AIiE1xE
-; ARM64: .align 3
+; ARM64: .p2align 3
; ARM64-LABEL: __emutls_v._ZN1AIiE1xE:
; ARM64-NEXT: .xword 4
; ARM64-NEXT: .xword 4
@@ -198,7 +198,7 @@
; ARM64: .section .data.__emutls_v._ZN1AIfE1xE,{{.*}},__emutls_v._ZN1AIfE1xE,comdat
; ARM64: .weak __emutls_v._ZN1AIfE1xE
-; ARM64: .align 3
+; ARM64: .p2align 3
; ARM64-LABEL: __emutls_v._ZN1AIfE1xE:
; ARM64-NEXT: .xword 4
; ARM64-NEXT: .xword 4
@@ -207,7 +207,7 @@
; ARM64: .section .rodata.__emutls_t._ZN1AIfE1xE,{{.*}},__emutls_t._ZN1AIfE1xE,comdat
; ARM64: .weak __emutls_t._ZN1AIfE1xE
-; ARM64: .align 2
+; ARM64: .p2align 2
; ARM64-LABEL: __emutls_t._ZN1AIfE1xE:
; ARM64-NEXT: .word 0
; ARM64-NEXT: .size
diff --git a/llvm/test/CodeGen/AArch64/emutls_generic.ll b/llvm/test/CodeGen/AArch64/emutls_generic.ll
index 33df6cc..03473cf 100644
--- a/llvm/test/CodeGen/AArch64/emutls_generic.ll
+++ b/llvm/test/CodeGen/AArch64/emutls_generic.ll
@@ -39,7 +39,7 @@
; ARM_64-NOT: __emutls_v.external_x:
; ARM_64: .data{{$}}
; ARM_64: .globl __emutls_v.external_y
-; ARM_64: .align 3
+; ARM_64: .p2align 3
; ARM_64-LABEL: __emutls_v.external_y:
; ARM_64-NEXT: .xword 1
; ARM_64-NEXT: .xword 2
@@ -51,7 +51,7 @@
; ARM_64-NEXT: .byte 7
; ARM_64: .data{{$}}
; ARM_64-NOT: .globl __emutls_v
-; ARM_64: .align 3
+; ARM_64: .p2align 3
; ARM_64-LABEL: __emutls_v.internal_y:
; ARM_64-NEXT: .xword 8
; ARM_64-NEXT: .xword 16
diff --git a/llvm/test/CodeGen/AArch64/global-merge-3.ll b/llvm/test/CodeGen/AArch64/global-merge-3.ll
index 6895380..481be40 100644
--- a/llvm/test/CodeGen/AArch64/global-merge-3.ll
+++ b/llvm/test/CodeGen/AArch64/global-merge-3.ll
@@ -21,7 +21,7 @@
}
;CHECK: .type .L_MergedGlobals,@object // @_MergedGlobals
-;CHECK: .align 4
+;CHECK: .p2align 4
;CHECK: .L_MergedGlobals:
;CHECK: .size .L_MergedGlobals, 4004
@@ -29,7 +29,7 @@
;CHECK: .local .L_MergedGlobals.1
;CHECK: .comm .L_MergedGlobals.1,4000,16
-;CHECK-APPLE-IOS: .align 4
+;CHECK-APPLE-IOS: .p2align 4
;CHECK-APPLE-IOS: l__MergedGlobals:
;CHECK-APPLE-IOS: .long 1
;CHECK-APPLE-IOS: .space 4000
diff --git a/llvm/test/CodeGen/AArch64/stackmap-liveness.ll b/llvm/test/CodeGen/AArch64/stackmap-liveness.ll
index 6b37aac..224a9c4 100644
--- a/llvm/test/CodeGen/AArch64/stackmap-liveness.ll
+++ b/llvm/test/CodeGen/AArch64/stackmap-liveness.ll
@@ -37,7 +37,7 @@
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .byte 8
; Align
-; CHECK-NEXT: .align 3
+; CHECK-NEXT: .p2align 3
%1 = select i1 %c, i64 1, i64 2
call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 32, i8* null, i32 0)
ret i64 %1