[AVX512] Fix load opcode for fast isel.
Differential Revision: http://reviews.llvm.org/D21067
llvm-svn: 272006
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index d06d7e2..d62a3c7 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -452,7 +452,7 @@
assert(Subtarget->hasAVX512());
// Note: There are a lot more choices based on type with AVX-512, but
// there's really no advantage when the load isn't masked.
- Opc = (Alignment >= 64) ? X86::VMOVDQA64Zmr : X86::VMOVDQU64Zmr;
+ Opc = (Alignment >= 64) ? X86::VMOVDQA64Zrm : X86::VMOVDQU64Zrm;
RC = &X86::VR512RegClass;
break;
}