commit 62b7fd136e69426ce2655e4cda3e989ccd83ab6a
author Chris Lattner <sabre@nondot.org> Sun Apr 07 20:49:59 2002 +0000
committer Chris Lattner <sabre@nondot.org> Sun Apr 07 20:49:59 2002 +0000
tree 57d9202d4dd7e3d248f5f4c5717d0c55ec62e43f
parent 53a46fb75983cad20b309d920d59d10a6580a332

Change references to the Method class to be references to the Function
class.  The Method class is obsolete (renamed) and all references to it
are being converted over to Function.

llvm-svn: 2144

llvm/lib/Target/Sparc/SparcInstrInfo.cpp

diff --git a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
index a44dc7f..aa618c9 100644
--- a/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -17,7 +17,7 @@
 #include "llvm/CodeGen/InstrSelectionSupport.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineCodeForMethod.h"
-#include "llvm/Method.h"
+#include "llvm/Function.h"
 #include "llvm/ConstantVals.h"
 #include "llvm/DerivedTypes.h"
 
@@ -136,11 +136,10 @@
 // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
 // 
 void
-UltraSparcInstrInfo::CreateCodeToLoadConst(Method* method,
-                                           Value* val,
+UltraSparcInstrInfo::CreateCodeToLoadConst(Function *F, Value* val,
                                            Instruction* dest,
-                                           std::vector<MachineInstr*>& minstrVec,
-                                           std::vector<TmpInstruction*>& tempVec) const
+                                           std::vector<MachineInstr*>&minstrVec,
+                                    std::vector<TmpInstruction*>& tempVec) const
 {
   MachineInstr* minstr;
   
@@ -197,22 +196,23 @@
       
       minstr = new MachineInstr(SETX);
       minstr->SetMachineOperandVal(0, MachineOperand::MO_PCRelativeDisp, val);
-      minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, tmpReg,
+      minstr->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister,tmpReg,
                                    /*isdef*/ true);
-      minstr->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,addrVal);
+      minstr->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,
+                                   addrVal);
       minstrVec.push_back(minstr);
       
       if (isa<Constant>(val))
         {
           // Make sure constant is emitted to constant pool in assembly code.
-          MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(method);
+          MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(F);
           mcinfo.addToConstantPool(cast<Constant>(val));
           
           // Generate the load instruction
           minstr = new MachineInstr(ChooseLoadInstruction(val->getType()));
           minstr->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister,
                                        addrVal);
-          minstr->SetMachineOperandConst(1, MachineOperand::MO_SignExtendedImmed,
+          minstr->SetMachineOperandConst(1,MachineOperand::MO_SignExtendedImmed,
                                        zeroOffset);
           minstr->SetMachineOperandVal(2, MachineOperand::MO_VirtualRegister,
                                        dest);
@@ -229,7 +229,7 @@
 // Any temp. registers (TmpInstruction) created are returned in `tempVec'.
 // 
 void
-UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(Method* method,
+UltraSparcInstrInfo::CreateCodeToCopyIntToFloat(Function *F,
                                          Value* val,
                                          Instruction* dest,
                                          std::vector<MachineInstr*>& minstrVec,
@@ -238,10 +238,10 @@
 {
   assert((val->getType()->isIntegral() || val->getType()->isPointerType())
          && "Source type must be integral");
-  assert((dest->getType() ==Type::FloatTy || dest->getType() ==Type::DoubleTy)
+  assert((dest->getType() == Type::FloatTy || dest->getType() == Type::DoubleTy)
          && "Dest type must be float/double");
   
-  MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(method);
+  MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(F);
   int offset = mcinfo.allocateLocalVar(target, val); 
   
   // Store instruction stores `val' to [%fp+offset].
@@ -255,7 +255,7 @@
   MachineInstr* store = new MachineInstr(ChooseStoreInstruction(tmpType));
   store->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, val);
   store->SetMachineOperandReg(1, target.getRegInfo().getFramePointer());
-  store->SetMachineOperandConst(2, MachineOperand::MO_SignExtendedImmed, offset);
+  store->SetMachineOperandConst(2,MachineOperand::MO_SignExtendedImmed, offset);
   minstrVec.push_back(store);
 
   // Load instruction loads [%fp+offset] to `dest'.
@@ -273,7 +273,7 @@
 // See the previous function for information about return values.
 // 
 void
-UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(Method* method,
+UltraSparcInstrInfo::CreateCodeToCopyFloatToInt(Function *F,
                                         Value* val,
                                         Instruction* dest,
                                         std::vector<MachineInstr*>& minstrVec,
@@ -285,7 +285,7 @@
   assert((dest->getType()->isIntegral() || dest->getType()->isPointerType())
          && "Dest type must be integral");
   
-  MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(method);
+  MachineCodeForMethod& mcinfo = MachineCodeForMethod::get(F);
   int offset = mcinfo.allocateLocalVar(target, val); 
   
   // Store instruction stores `val' to [%fp+offset].