CodeGen: TII: Take MachineInstr& in predicate API, NFC
Change TargetInstrInfo API to take `MachineInstr&` instead of
`MachineInstr*` in the functions related to predicated instructions
(I'll try to come back later and get some of the rest). All of these
functions require non-null parameters already, so references are more
clear. As a bonus, this happens to factor away a host of implicit
iterator => pointer conversions.
No functionality change intended.
llvm-svn: 261605
diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index 41f9f0b..2bf0c66 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -668,16 +668,15 @@
BBI.ExtraCost = 0;
BBI.ExtraCost2 = 0;
BBI.ClobbersPred = false;
- for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
- I != E; ++I) {
- if (I->isDebugValue())
+ for (auto &MI : *BBI.BB) {
+ if (MI.isDebugValue())
continue;
- if (I->isNotDuplicable())
+ if (MI.isNotDuplicable())
BBI.CannotBeCopied = true;
- bool isPredicated = TII->isPredicated(I);
- bool isCondBr = BBI.IsBrAnalyzable && I->isConditionalBranch();
+ bool isPredicated = TII->isPredicated(MI);
+ bool isCondBr = BBI.IsBrAnalyzable && MI.isConditionalBranch();
// A conditional branch is not predicable, but it may be eliminated.
if (isCondBr)
@@ -685,8 +684,8 @@
if (!isPredicated) {
BBI.NonPredSize++;
- unsigned ExtraPredCost = TII->getPredicationCost(&*I);
- unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
+ unsigned ExtraPredCost = TII->getPredicationCost(MI);
+ unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false);
if (NumCycles > 1)
BBI.ExtraCost += NumCycles-1;
BBI.ExtraCost2 += ExtraPredCost;
@@ -710,10 +709,10 @@
// FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
// still potentially predicable.
std::vector<MachineOperand> PredDefs;
- if (TII->DefinesPredicate(I, PredDefs))
+ if (TII->DefinesPredicate(MI, PredDefs))
BBI.ClobbersPred = true;
- if (!TII->isPredicable(I)) {
+ if (!TII->isPredicable(MI)) {
BBI.IsUnpredicable = true;
return;
}
@@ -1011,9 +1010,9 @@
/// Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all
/// values defined in MI which are not live/used by MI.
-static void UpdatePredRedefs(MachineInstr *MI, LivePhysRegs &Redefs) {
+static void UpdatePredRedefs(MachineInstr &MI, LivePhysRegs &Redefs) {
SmallVector<std::pair<unsigned, const MachineOperand*>, 4> Clobbers;
- Redefs.stepForward(*MI, Clobbers);
+ Redefs.stepForward(MI, Clobbers);
// Now add the implicit uses for each of the clobbered values.
for (auto Reg : Clobbers) {
@@ -1491,8 +1490,8 @@
if (!BBI2->BB->empty() && (DI2 == BBI2->BB->end())) {
MachineBasicBlock::iterator BBI1T = BBI1->BB->getFirstTerminator();
MachineBasicBlock::iterator BBI2T = BBI2->BB->getFirstTerminator();
- if ((BBI1T != BBI1->BB->end()) && TII->isPredicated(BBI1T) &&
- ((BBI2T != BBI2->BB->end()) && !TII->isPredicated(BBI2T)))
+ if (BBI1T != BBI1->BB->end() && TII->isPredicated(*BBI1T) &&
+ BBI2T != BBI2->BB->end() && !TII->isPredicated(*BBI2T))
--DI2;
}
@@ -1515,7 +1514,7 @@
// (e.g. a predicated return). If that is the case, we cannot merge
// it with the tail block.
MachineBasicBlock::const_iterator TI = BBI.BB->getFirstTerminator();
- if (TI != BBI.BB->end() && TII->isPredicated(TI))
+ if (TI != BBI.BB->end() && TII->isPredicated(*TI))
CanMergeTail = false;
// There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
// check if there are any other predecessors besides those.
@@ -1581,7 +1580,7 @@
bool AnyUnpred = false;
bool MaySpec = LaterRedefs != nullptr;
for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
- if (I->isDebugValue() || TII->isPredicated(I))
+ if (I->isDebugValue() || TII->isPredicated(*I))
continue;
// It may be possible not to predicate an instruction if it's the 'true'
// side of a diamond and the 'false' side may re-define the instruction's
@@ -1593,7 +1592,7 @@
// If any instruction is predicated, then every instruction after it must
// be predicated.
MaySpec = false;
- if (!TII->PredicateInstruction(I, Cond)) {
+ if (!TII->PredicateInstruction(*I, Cond)) {
#ifndef NDEBUG
dbgs() << "Unable to predicate " << *I << "!\n";
#endif
@@ -1602,7 +1601,7 @@
// If the predicated instruction now redefines a register as the result of
// if-conversion, add an implicit kill.
- UpdatePredRedefs(I, Redefs);
+ UpdatePredRedefs(*I, Redefs);
}
BBI.Predicate.append(Cond.begin(), Cond.end());
@@ -1622,25 +1621,24 @@
bool IgnoreBr) {
MachineFunction &MF = *ToBBI.BB->getParent();
- for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
- E = FromBBI.BB->end(); I != E; ++I) {
+ for (auto &I : *FromBBI.BB) {
// Do not copy the end of the block branches.
- if (IgnoreBr && I->isBranch())
+ if (IgnoreBr && I.isBranch())
break;
- MachineInstr *MI = MF.CloneMachineInstr(I);
+ MachineInstr *MI = MF.CloneMachineInstr(&I);
ToBBI.BB->insert(ToBBI.BB->end(), MI);
ToBBI.NonPredSize++;
- unsigned ExtraPredCost = TII->getPredicationCost(&*I);
- unsigned NumCycles = SchedModel.computeInstrLatency(&*I, false);
+ unsigned ExtraPredCost = TII->getPredicationCost(I);
+ unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);
if (NumCycles > 1)
ToBBI.ExtraCost += NumCycles-1;
ToBBI.ExtraCost2 += ExtraPredCost;
if (!TII->isPredicated(I) && !MI->isDebugValue()) {
- if (!TII->PredicateInstruction(MI, Cond)) {
+ if (!TII->PredicateInstruction(*MI, Cond)) {
#ifndef NDEBUG
- dbgs() << "Unable to predicate " << *I << "!\n";
+ dbgs() << "Unable to predicate " << I << "!\n";
#endif
llvm_unreachable(nullptr);
}
@@ -1648,7 +1646,7 @@
// If the predicated instruction now redefines a register as the result of
// if-conversion, add an implicit kill.
- UpdatePredRedefs(MI, Redefs);
+ UpdatePredRedefs(*MI, Redefs);
// Some kill flags may not be correct anymore.
if (!DontKill.empty())
@@ -1695,7 +1693,7 @@
ToBBI.BB->splice(ToTI, FromBBI.BB, FromBBI.BB->begin(), FromTI);
// If FromBB has non-predicated terminator we should copy it at the end.
- if ((FromTI != FromBBI.BB->end()) && !TII->isPredicated(FromTI))
+ if (FromTI != FromBBI.BB->end() && !TII->isPredicated(*FromTI))
ToTI = ToBBI.BB->end();
ToBBI.BB->splice(ToTI, FromBBI.BB, FromTI, FromBBI.BB->end());