commit 63702e2bf74af10f755a54d0cade8a7214b783c7
author Rafael Espindola <rafael.espindola@gmail.com> Mon Jun 01 01:30:01 2015 +0000
committer Rafael Espindola <rafael.espindola@gmail.com> Mon Jun 01 01:30:01 2015 +0000
tree 162cde906b0378280d62e7b1f495590363414493
parent a66395e18401dd6bc2c840c9f7587d1ec5a05efc

Store a bit in MCSection saying if it was registered with MCAssembler.

With this we can replace a SetVector with a plain std::vector.

llvm-svn: 238706

llvm/lib/MC/MachObjectWriter.cpp

diff --git a/llvm/lib/MC/MachObjectWriter.cpp b/llvm/lib/MC/MachObjectWriter.cpp
index 94c26cc..1ee3244 100644
--- a/llvm/lib/MC/MachObjectWriter.cpp
+++ b/llvm/lib/MC/MachObjectWriter.cpp
@@ -789,9 +789,7 @@
   uint64_t SectionDataSize = 0;
   uint64_t SectionDataFileSize = 0;
   uint64_t VMSize = 0;
-  for (MCAssembler::const_iterator it = Asm.begin(),
-         ie = Asm.end(); it != ie; ++it) {
-    const MCSection &Sec = *it;
+  for (const MCSection &Sec : Asm) {
     uint64_t Address = getSectionAddress(&Sec);
     uint64_t Size = Layout.getSectionAddressSize(&Sec);
     uint64_t FileSize = Layout.getSectionFileSize(&Sec);
@@ -799,7 +797,7 @@
 
     VMSize = std::max(VMSize, Address + Size);
 
-    if (it->isVirtualSection())
+    if (Sec.isVirtualSection())
       continue;
 
     SectionDataSize = std::max(SectionDataSize, Address + Size);
@@ -820,12 +818,11 @@
 
   // ... and then the section headers.
   uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize;
-  for (MCAssembler::const_iterator it = Asm.begin(),
-         ie = Asm.end(); it != ie; ++it) {
-    std::vector<RelAndSymbol> &Relocs = Relocations[&*it];
+  for (const MCSection &Sec : Asm) {
+    std::vector<RelAndSymbol> &Relocs = Relocations[&Sec];
     unsigned NumRelocs = Relocs.size();
-    uint64_t SectionStart = SectionDataStart + getSectionAddress(&*it);
-    WriteSection(Asm, Layout, *it, SectionStart, RelocTableEnd, NumRelocs);
+    uint64_t SectionStart = SectionDataStart + getSectionAddress(&Sec);
+    WriteSection(Asm, Layout, Sec, SectionStart, RelocTableEnd, NumRelocs);
     RelocTableEnd += NumRelocs * sizeof(MachO::any_relocation_info);
   }
 
@@ -899,9 +896,7 @@
   }
 
   // Write the actual section data.
-  for (MCAssembler::const_iterator it = Asm.begin(),
-         ie = Asm.end(); it != ie; ++it) {
-    MCSection &Sec = *it;
+  for (const MCSection &Sec : Asm) {
     Asm.writeSectionData(&Sec, Layout);
 
     uint64_t Pad = getPaddingSize(&Sec, Layout);
@@ -912,11 +907,10 @@
   WriteZeros(SectionDataPadding);
 
   // Write the relocation entries.
-  for (MCAssembler::const_iterator it = Asm.begin(),
-         ie = Asm.end(); it != ie; ++it) {
+  for (const MCSection &Sec : Asm) {
     // Write the section relocation entries, in reverse order to match 'as'
     // (approximately, the exact algorithm is more complicated than this).
-    std::vector<RelAndSymbol> &Relocs = Relocations[&*it];
+    std::vector<RelAndSymbol> &Relocs = Relocations[&Sec];
     for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
       Write32(Relocs[e - i - 1].MRE.r_word0);
       Write32(Relocs[e - i - 1].MRE.r_word1);