[mips][mc] Add basic support for R_MIPS_JALR/R_MICROMIPS_JALR
R_MIPS_JALR/R_MICROMIPS_JALR can now be parsed in .s files and emitted to .o.
They are still not generated with JALR.
Differential revision: https://reviews.llvm.org/D54721
llvm-svn: 347398
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
index 63f9151..265d114 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
@@ -339,6 +339,8 @@
(MCFixupKind)Mips::fixup_MICROMIPS_TLS_TPREL_HI16)
.Case("R_MICROMIPS_TLS_TPREL_LO16",
(MCFixupKind)Mips::fixup_MICROMIPS_TLS_TPREL_LO16)
+ .Case("R_MIPS_JALR", (MCFixupKind)Mips::fixup_Mips_JALR)
+ .Case("R_MICROMIPS_JALR", (MCFixupKind)Mips::fixup_MICROMIPS_JALR)
.Default(MCAsmBackend::getFixupKind(Name));
}
@@ -417,7 +419,9 @@
{ "fixup_MICROMIPS_TLS_TPREL_HI16", 0, 16, 0 },
{ "fixup_MICROMIPS_TLS_TPREL_LO16", 0, 16, 0 },
{ "fixup_Mips_SUB", 0, 64, 0 },
- { "fixup_MICROMIPS_SUB", 0, 64, 0 }
+ { "fixup_MICROMIPS_SUB", 0, 64, 0 },
+ { "fixup_Mips_JALR", 0, 32, 0 },
+ { "fixup_MICROMIPS_JALR", 0, 32, 0 }
};
static_assert(array_lengthof(LittleEndianInfos) == Mips::NumTargetFixupKinds,
"Not all MIPS little endian fixup kinds added!");
@@ -495,7 +499,9 @@
{ "fixup_MICROMIPS_TLS_TPREL_HI16", 16, 16, 0 },
{ "fixup_MICROMIPS_TLS_TPREL_LO16", 16, 16, 0 },
{ "fixup_Mips_SUB", 0, 64, 0 },
- { "fixup_MICROMIPS_SUB", 0, 64, 0 }
+ { "fixup_MICROMIPS_SUB", 0, 64, 0 },
+ { "fixup_Mips_JALR", 0, 32, 0 },
+ { "fixup_MICROMIPS_JALR", 0, 32, 0 }
};
static_assert(array_lengthof(BigEndianInfos) == Mips::NumTargetFixupKinds,
"Not all MIPS big endian fixup kinds added!");
@@ -553,6 +559,7 @@
case Mips::fixup_Mips_TLSLDM:
case Mips::fixup_Mips_TPREL_HI:
case Mips::fixup_Mips_TPREL_LO:
+ case Mips::fixup_Mips_JALR:
case Mips::fixup_MICROMIPS_CALL16:
case Mips::fixup_MICROMIPS_GOT_DISP:
case Mips::fixup_MICROMIPS_GOT_PAGE:
@@ -565,6 +572,7 @@
case Mips::fixup_MICROMIPS_TLS_LDM:
case Mips::fixup_MICROMIPS_TLS_TPREL_HI16:
case Mips::fixup_MICROMIPS_TLS_TPREL_LO16:
+ case Mips::fixup_MICROMIPS_JALR:
return true;
}
}
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
index c600382..0e8de05 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
@@ -401,6 +401,10 @@
return ELF::R_MICROMIPS_HIGHER;
case Mips::fixup_MICROMIPS_HIGHEST:
return ELF::R_MICROMIPS_HIGHEST;
+ case Mips::fixup_Mips_JALR:
+ return ELF::R_MIPS_JALR;
+ case Mips::fixup_MICROMIPS_JALR:
+ return ELF::R_MICROMIPS_JALR;
}
llvm_unreachable("invalid fixup kind!");
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
index d7f6cf9..eedad16 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h
@@ -222,6 +222,10 @@
fixup_Mips_SUB,
fixup_MICROMIPS_SUB,
+ // resulting in - R_MIPS_JALR/R_MICROMIPS_JALR
+ fixup_Mips_JALR,
+ fixup_MICROMIPS_JALR,
+
// Marker
LastTargetFixupKind,
NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
diff --git a/llvm/test/MC/Mips/reloc-directive.s b/llvm/test/MC/Mips/reloc-directive.s
index be5d693..bf7c91b 100644
--- a/llvm/test/MC/Mips/reloc-directive.s
+++ b/llvm/test/MC/Mips/reloc-directive.s
@@ -79,6 +79,10 @@
nop
.reloc 124, R_MICROMIPS_TLS_TPREL_LO16, 4 # ASM: .reloc 124, R_MICROMIPS_TLS_TPREL_LO16, 4
nop
+ .reloc 128, R_MIPS_JALR, 4 # ASM: .reloc 128, R_MIPS_JALR, 4
+ nop
+ .reloc 132, R_MICROMIPS_JALR, 4 # ASM: .reloc 132, R_MICROMIPS_JALR, 4
+ nop
# OBJ-O32-LABEL: Name: .text
# OBJ-O32: 0000: 00000000 00000000 00000008 00000000
@@ -89,6 +93,7 @@
# OBJ-O32-NEXT: 0050: 00000000 00000004 00000004 00000004
# OBJ-O32-NEXT: 0060: 00000000 00000000 00000000 00000000
# OBJ-O32-NEXT: 0070: 00000000 00000000 00000000 00000000
+# OBJ-O32-NEXT: 0080: 00000000 00000000
# OBJ-O32-LABEL: }
# OBJ-O32-LABEL: Relocations [
# OBJ-O32: 0x0 R_MIPS_NONE .text 0x0
@@ -121,6 +126,8 @@
# OBJ-O32-NEXT: 0x74 R_MICROMIPS_TLS_LDM - 0x0
# OBJ-O32-NEXT: 0x78 R_MICROMIPS_TLS_TPREL_HI16 - 0x0
# OBJ-O32-NEXT: 0x7C R_MICROMIPS_TLS_TPREL_LO16 - 0x0
+# OBJ-O32-NEXT: 0x80 R_MIPS_JALR - 0x0
+# OBJ-O32-NEXT: 0x84 R_MICROMIPS_JALR - 0x0
# OBJ-O32-NEXT: 0x1C R_MIPS_GOT16 - 0x0
# OBJ-O32-NEXT: 0x60 R_MICROMIPS_GOT16 - 0x0
@@ -133,6 +140,7 @@
# OBJ-N32-NEXT: 0050: 00000000 00000000 00000000 00000000
# OBJ-N32-NEXT: 0060: 00000000 00000000 00000000 00000000
# OBJ-N32-NEXT: 0070: 00000000 00000000 00000000 00000000
+# OBJ-N32-NEXT: 0080: 00000000 00000000
# OBJ-N32-LABEL: }
# OBJ-N32-LABEL: Relocations [
@@ -168,6 +176,8 @@
# OBJ-N32-NEXT: 0x74 R_MICROMIPS_TLS_LDM - 0x4
# OBJ-N32-NEXT: 0x78 R_MICROMIPS_TLS_TPREL_HI16 - 0x4
# OBJ-N32-NEXT: 0x7C R_MICROMIPS_TLS_TPREL_LO16 - 0x4
+# OBJ-N32-NEXT: 0x80 R_MIPS_JALR - 0x4
+# OBJ-N32-NEXT: 0x84 R_MICROMIPS_JALR - 0x4
# OBJ-N64-LABEL: Name: .text
# OBJ-N64: 0000: 00000000 00000000 00000000 00000000
@@ -178,6 +188,7 @@
# OBJ-N64-NEXT: 0050: 00000000 00000000 00000000 00000000
# OBJ-N64-NEXT: 0060: 00000000 00000000 00000000 00000000
# OBJ-N64-NEXT: 0070: 00000000 00000000 00000000 00000000
+# OBJ-N64-NEXT: 0080: 00000000 00000000
# OBJ-N64-LABEL: }
# OBJ-N64-LABEL: Relocations [
# OBJ-N64: 0x4 R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE .text 0x0
@@ -212,3 +223,5 @@
# OBJ-N64-NEXT: 0x74 R_MICROMIPS_TLS_LDM/R_MIPS_NONE/R_MIPS_NONE - 0x4
# OBJ-N64-NEXT: 0x78 R_MICROMIPS_TLS_TPREL_HI16/R_MIPS_NONE/R_MIPS_NONE - 0x4
# OBJ-N64-NEXT: 0x7C R_MICROMIPS_TLS_TPREL_LO16/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x80 R_MIPS_JALR/R_MIPS_NONE/R_MIPS_NONE - 0x4
+# OBJ-N64-NEXT: 0x84 R_MICROMIPS_JALR/R_MIPS_NONE/R_MIPS_NONE - 0x4