commit 64e5d7d3ae3d138709bca57a972bce4803982b70
author Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Oct 20 19:33:12 2017 +0000
committer Krzysztof Parzyszek <kparzysz@codeaurora.org> Fri Oct 20 19:33:12 2017 +0000
tree 3720ca25c74b69a473fff9370013de60b0e53a5b
parent 94a114fc3902692018f15b0b27ab9fc57d6cb747

[Hexagon] Reorganize and update instruction patterns

llvm-svn: 316228

llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp

diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
index b084e04..a5381c1 100644
--- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
@@ -1590,10 +1590,14 @@
     case Hexagon::A4_cmpbgtui:
     case Hexagon::A4_cmpheqi:
     case Hexagon::A4_cmphgti:
-    case Hexagon::A4_cmphgtui:
+    case Hexagon::A4_cmphgtui: {
       SrcReg2 = 0;
+      const MachineOperand &Op2 = MI.getOperand(2);
+      if (!Op2.isImm())
+        return false;
       Value = MI.getOperand(2).getImm();
       return true;
+    }
   }
 
   return false;